ST92F124V1QB STMicroelectronics, ST92F124V1QB Datasheet - Page 262
![IC MCU 8BIT 128K MEMORY 100-PQFP](/photos/6/81/68170/497-100-pqfp_series_sml.jpg)
ST92F124V1QB
Manufacturer Part Number
ST92F124V1QB
Description
IC MCU 8BIT 128K MEMORY 100-PQFP
Manufacturer
STMicroelectronics
Series
ST9r
Datasheet
1.ST92F150CV1TB.pdf
(429 pages)
Specifications of ST92F124V1QB
Core Processor
ST9
Core Size
8/16-Bit
Speed
24MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
77
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
100-QFP
Processor Series
ST92F12x
Core
ST9
Data Bus Width
8 bit, 16 bit
Data Ram Size
4 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
80
Number Of Timers
16 bit
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST92F150-EPB
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Manufacturer
Quantity
Price
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Manufacturer:
MAXIM
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Part Number:
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Manufacturer:
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I2C BUS INTERFACE
10.8 I
10.8.1 Introduction
The I
tween the microcontroller and the serial I
provides both multimaster and slave functions with
both 7-bit and 10-bit address modes; it controls all
I
timing and supports both standard (100KHz) and
fast I
Using DMA, data can be transferred with minimum
use of CPU time.
The peripheral uses two external lines to perform
the protocols: SDA, SCL.
10.8.2 Main Features
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9
2
2
2
C bus-specific sequencing, protocol, arbitration,
C Master Features:
C Slave Features:
Parallel-bus/I
Multi-master capability
7-bit/10-bit Addressing
Standard I
Transmitter/Receiver flag
End-of-byte transmission flag
Transfer problem detection
Interrupt generation on error conditions
Interrupt generation on transfer request and on
data received
Start bit detection flag
Clock generation
I
Arbitration Lost flag
End of byte transmission flag
Transmitter/Receiver flag
Stop/Start generation
Stop bit detection
I
Detection of misplaced start or stop condition
Programmable I
bit and 10-bit mode)
General Call address programmable
Transfer problem detection
End of byte transmission flag
Transmitter/Receiver flag.
2
2
C bus busy flag
C bus busy flag
2
2
C modes (400KHz).
2
C bus Interface serves as an interface be-
C BUS INTERFACE
2
C mode/Fast I
2
C protocol converter
2
C Address detection (both 7-
2
C mode
2
C bus. It
Interrupt Features:
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DMA Features:
■
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Interrupt generation on error condition, on
transmission request and on data received
Interrupt address vector for each interrupt
source
Pending bit and mask bit for each interrupt
source
Programmable interrupt priority respects the
other peripherals of the microcontroller
Interrupt address vector programmable
DMA both in transmission and in reception with
enabling bits
DMA from/toward both Register File and
Memory
End Of Block interrupt sources with the related
pending bits
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