ST92F150CR9TB STMicroelectronics, ST92F150CR9TB Datasheet - Page 128
![IC MCU 8BIT CAN 64K MEM 64-LQFP](/photos/12/15/121504/stmicroelectronics-64-lqfp_sml.jpg)
ST92F150CR9TB
Manufacturer Part Number
ST92F150CR9TB
Description
IC MCU 8BIT CAN 64K MEM 64-LQFP
Manufacturer
STMicroelectronics
Series
ST9r
Datasheet
1.ST92F150CV1TB.pdf
(429 pages)
Specifications of ST92F150CR9TB
Core Processor
ST9
Core Size
8/16-Bit
Speed
24MHz
Connectivity
CAN, I²C, SCI, SPI
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-LQFP
Processor Series
ST92F15x
Core
ST9
Data Bus Width
8 bit, 16 bit
Data Ram Size
2 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
80
Number Of Timers
16 bit
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST92F150-EPB
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST92F150CR9TB
Manufacturer:
STMicroelectronics
Quantity:
10 000
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ST92F124/F150/F250 - RESET AND CLOCK CONTROL UNIT (RCCU)
7.3 CLOCK MANAGEMENT
The various programmable features and operating modes of the CCU are handled by four registers:
– MODER (Mode Register)
– CLKCTL (Clock Control Register)
Figure 61. Clock Control Unit Programming
128/429
9
This is a System Register (R235, Group E).
The input clock divide-by-two and the CPU clock
prescaler factors are handled by this register.
This is a Paged Register (R240, Page 55).
The low power modes, the RCCU interrupts and
the interpretation of the HALT instruction are
handled by this register.
(CLK_FLAG)
XTSTOP
oscillator
Crystal
CK_AF
source
Wait for Interrupt and Low Power Modes:
LPOWFI (CLKCTL) selects Low Power operation automatically on entering WFI mode.
WFI_CKSEL (CLKCTL) selects the CK_AF clock automatically, if present, on entering WFI mode.
XTSTOP (CLK_FLAG) automatically stops the crystal oscillator when the CK_AF clock is present and selected.
CLOCK1
CK_AF
1/2
(MODER)
DIV2
0
1
CLOCK2
6/8/10/14
MX[1:0]
PLL
x
(PLLCONF)
1/16
DX[2:0]
1/N
– CLK_FLAG (Clock Flag Register)
– PLLCONF (PLL Configuration Register)
This is a Paged Register (R242, Page 55).
This register contains various status flags, as
well as control bits for clock selection.
This is a Paged Register (R246, Page 55).
PLL management is programmed in this register.
CSU_CKSEL
(CLK_FLAG)
0
1
XT_DIV16
0
1
(CLK_FLAG)
1/4
CKAF_SEL
(CLKCTL)
CKAF_ST
0
1
CPU Clock Prescaler
Peripherals
INTCLK
CK_128
and
to
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