Z16F2810FI20EG Zilog, Z16F2810FI20EG Datasheet - Page 270

• Manufacturer Part Number: Z16F2810FI20EG
• Description: IC ZNEO MCU FLASH 128K 80QFP
• Manufacturer: Zilog
• Series: Encore!® ZNEOr

Specifications of Z16F2810FI20EG

• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 80-BQFP
• Data Bus Width: 16 bit
• Data Ram Size: 4 B
• Interface Type: ESPI, I2C, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Comparator Operation
Operational Amplifier Operation
Interrupts
PS022008-0810
The comparator output reflects the relationship between the non-inverting input and the
inverting (reference) input. If the voltage on the non-inverting input is higher than the
voltage on the inverting input, the comparator output is at a high state. If the voltage on the
non-inverting input is lower than the voltage on the inverting input, the comparator output
is at a low state.
To operate, the comparator must be enabled by setting the CMPEN bit in the comparator
and op-amp register to 1. In addition the CINP and CINN comparator input alternate 
functions must be enabled on their respective GPIO pins. For more information, see
Alternate Functions
The comparator does not automatically power-down. To reduce operating current when
not in use, the comparator is disabled by clearing the CMPEN bit to 0.
To operate, the operational amplifier must be enabled by setting the OPEN bit in the 
comparator and op-amp register to 1. In addition, the OPINP, OPINN, and OPOUT alter-
nate functions must be enabled on their respective general-purpose I/O pins. For more
information, see
The logical value of the operational amplifier output (OPOUT) is read from the Port 3 data
input register if both the operational amplifier and input pin Schmitt trigger are enabled.
For more information, see
fier generates an interrupt via the GPIO Port B3 input interrupt, if enabled.
The output of the operational amplifier is also connected to an analog input (ANA3) of the
ADC multiplexer.
The operational amplifier does not automatically power-down. To reduce operating cur-
rent when not in use, the operational amplifier is disabled by clearing the
comparator and op-amp register to 0.
When the operational amplifier is disabled, the output is high impedance.
The comparator generates an interrupt on any change in the logic output value (from 0 to 1
and from 1 to 0). For information on enabling and prioritization of the comparator 
interrupt, see
Interrupt Controller
GPIO Alternate Functions
on page 69.
P R E L I M I N A R Y
GPIO Alternate Functions
on page 80.
on page 69.
on page 69. The operational ampli-
Product Specification
ZNEO
Analog Functions
OPEN
Z16F Series
bit in the
GPIO
254