STM32F103C8T6TR STMicroelectronics, STM32F103C8T6TR Datasheet - Page 8

• Manufacturer Part Number: STM32F103C8T6TR
• Description: MCU ARM 64KB FLASH MEM 48-LQFP
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32F103C8T6TR

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
• Peripherals: DMA, Motor Control PWM, PDR, POR, PVD, PWM, Temp Sensor, WDT
• Number Of I /o: 37
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• For Use With: 497-10048 - BOARD EVAL ACCELEROMETER497-10030 - STARTER KIT FOR STM32497-8511 - KIT STARTER FOR STM32 512K FLASH497-6438 - BOARD EVALUTION FOR STM32 512K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Description
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Overview
ARM
The ARM Cortex-M3 processor is the latest generation of ARM processors for embedded
systems. It has been developed to provide a low-cost platform that meets the needs of MCU
implementation, with a reduced pin count and low-power consumption, while delivering
outstanding computational performance and an advanced system response to interrupts.
The ARM Cortex-M3 32-bit RISC processor features exceptional code-efficiency, delivering
the high-performance expected from an ARM core in the memory size usually associated
with 8- and 16-bit devices.
The STM32F103xx performance line family having an embedded ARM core, is therefore
compatible with all ARM tools and software.
Figure 1
Embedded Flash memory
Embedded SRAM
Up to 20 Kbytes of embedded SRAM accessed (read/write) at CPU clock speed with 0 wait
states.
Nested vectored interrupt controller (NVIC)
The STM32F103xx performance line embeds a Nested Vectored Interrupt Controller able to
handle up to 43 maskable interrupt channels (not including the 16 interrupt lines of Cortex-
M3) and 16 priority levels.
This hardware block provides flexible interrupt management features with minimal interrupt
latency.
External interrupt/event controller (EXTI)
The external interrupt/event controller consists of 19 edge detectors lines used to generate
interrupt/event requests. Each line can be independently configured to select the trigger
event (rising edge, falling edge, both) and can be masked independently. A pending register
maintains the status of the interrupt requests. The EXTI can detect external line with pulse
width lower than the Internal APB2 clock period. Up to 80 GPIOs are connected to the 16
external interrupt lines.
Up to 128 Kbytes of embedded Flash is available for storing programs and data.
Closely coupled NVIC gives low latency interrupt processing
Interrupt entry vector table address passed directly to the core
Closely coupled NVIC core interface
Allows early processing of interrupts
Processing of late arriving higher priority interrupts
Support for tail-chaining
Processor state automatically saved
Interrupt entry restored on interrupt exit with no instruction overhead
®
Cortex
shows the general block diagram of the device family.
TM
-M3 core with embedded Flash and SRAM
STM32F103xx