STM32F103C8T6TR STMicroelectronics, STM32F103C8T6TR Datasheet - Page 43

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STM32F103C8T6TR

Manufacturer Part Number
STM32F103C8T6TR
Description
MCU ARM 64KB FLASH MEM 48-LQFP
Manufacturer
STMicroelectronics
Series
STM32r

Specifications of STM32F103C8T6TR

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
DMA, Motor Control PWM, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
37
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
For Use With
497-10048 - BOARD EVAL ACCELEROMETER497-10030 - STARTER KIT FOR STM32497-8511 - KIT STARTER FOR STM32 512K FLASH497-6438 - BOARD EVALUTION FOR STM32 512K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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STM32F103xx
5.3.12
I/O port pin characteristics
General input/output characteristics
Unless otherwise specified, the parameters given in
performed under ambient temperature and V
Table
All unused pins must be held at a fixed voltage, by using the I/O output mode, an external
pull-up or pull-down resistor (see
Table 29.
1. V
2. Values based on characterization results, and not tested in production.
3. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.
4. With a minimum of 100 mV.
5. Leakage could be higher than max. if negative current is injected on adjacent pins.
6. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable
Symbol
V
R
R
C
V
V
V
V
I
PMOS/NMOS. This MOS/NMOS contribution
lkg
hys
PU
PD
IH
IH
IO
IL
IL
DD
7.
= 3.3 V, T
Input low level voltage
IO TC input high level
voltage
IO FT high level voltage
Input low level voltage
Input high level voltage
IO TC Schmitt trigger voltage
hysteresis
IO TC Schmitt trigger voltage
hysteresis
Input leakage current
Weak pull-up equivalent
resistor
Weak pull-down equivalent
resistor
I/O pin capacitance
I/O static characteristics
A
= 40 to 105 °C unless otherwise specified.
(2)
(6)
(6)
Parameter
(3)
(3)
(5)
(2)
(2)
(2)
(2)
Figure
(1)
5 V tolerant I/Os
to the series resistance is minimum
V
Standard I/Os
15).
CMOS ports
Conditions
SS
TTL ports
V
V
V
IN
IN
IN
DD
V
= 5 V
IN
V
V
supply voltage conditions summarized in
SS
DD
V
DD
Table 29
0.65 V
–0.5
–0.5
Min
30
30
2
2
DD
are derived from tests
Electrical characteristics
5% V
(~10% order)
Typ
200
40
40
5
DD
(4)
0.35 V
.
V
V
DD
DD
5.5V
Max
0.8
50
50
3
+0.5
+0.5
1
DD
Unit
mV
mV
43/67
µA
k
k
pF
V
V

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