ST72F63BK4M1 STMicroelectronics, ST72F63BK4M1 Datasheet - Page 123

• Manufacturer Part Number: ST72F63BK4M1
• Description: IC MCU 8BIT LS 16K 34-SOIC
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST72F63BK4M1

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SCI, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 34-SOIC (7.5mm Width)
• Processor Series: ST72F6x
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: I2C, SCI, USB
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 27
• Number Of Timers: 2 x 16 bit
• Operating Supply Voltage: 4 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7MDTU3-EPB/US, ST72F63B-SK/RAIS, ST7MDTU3-EMU3, STX-RLINK
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit
• For Use With: 497-5521 - EVAL BOARD LOW SPEED USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-2115-5

ST7263Bxx
I²C Data register (DR)
These bits contain the byte to be received or transmitted on the bus.
●
●
Reset value: 0000 0000 (00h)
I²C Own Address register (OAR)
Reset value: 0000 0000 (00h)
ADD7
Transmitter mode: byte transmission start automatically when the software writes in the
DR register.
Receiver mode: the first data byte is received automatically in the DR register using the
least significant bit of the address. The following data bytes are then received one by
one after reading the DR register.
D7
7
7
[7:1] ADD[7:1] Interface address.
0 ADD0 Address direction bit.
ADD6
D6
These bits define the I²C bus address of the interface. They are not cleared when
the interface is disabled (PE=0).
This bit is don’t care, the interface acknowledges either 0 or 1. It is not cleared
when the interface is disabled (PE=0).
Note: Address 01h is always ignored.
ADD5
D5
Doc ID 7516 Rev 8
ADD4
D4
Read/write
Read/write
ADD3
D3
ADD2
D2
On-chip peripherals
ADD1
D1
ADD0
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D0
0
0