LPC2460FET208,551 NXP Semiconductors, LPC2460FET208,551 Datasheet - Page 756

• Manufacturer Part Number: LPC2460FET208,551
• Description: IC ARM7 MCU ROMLESS 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2460FET208,551

• Program Memory Type: ROMless
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2C/I2S/SPI/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB2460, MCB2460U
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4260; 935283232551; LPC2460FET208-S

NXP Semiconductors
5. RealMonitor build options
UM10237_4
User manual
RealMonitor was built with the following options:
RM_OPT_DATALOGGING=FALSE
RM_OPT_STOPSTART=TRUE
RM_OPT_SOFTBREAKPOINT=TRUE
RM_OPT_HARDBREAKPOINT=TRUE
RM_OPT_HARDWATCHPOINT=TRUE
RM_OPT_SEMIHOSTING=FALSE
RM_OPT_SAVE_FIQ_REGISTERS=TRUE
This option enables or disables support for any target-to-host packets sent on a non
RealMonitor (third-party) channel.
This option enables or disables support for all stop and start debugging features.
This option enables or disables support for software breakpoints.
Enabled for cores with EmbeddedICE-RT. This device uses ARM-7TDMI-S Rev 4 with
EmbeddedICE-RT.
Enabled for cores with EmbeddedICE-RT. This device uses ARM-7TDMI-S Rev 4 with
EmbeddedICE-RT.
This option enables or disables support for SWI semi-hosting. Semi-hosting provides
code running on an ARM target use of facilities on a host computer that is running an
ARM debugger. Examples of such facilities include the keyboard input, screen output,
and disk I/O.
This option determines whether the FIQ-mode registers are saved into the registers
block when RealMonitor stops.
;is not aware of the VIC interrupt priority hardware so trick
;rm_irqhandler2 to return here
STMFD sp!, {ip,pc}
LDR
;rm_irqhandler2 returns here
MSR
MSR
STMFD sp!, {r0}
LDR
STR
LDMFD sp!, {r12,r14,r0}
SUBS pc, r14, #4
END
pc, rm_irqhandler2
cpsr_c, #0x52
spsr, r12
r0, =VICBaseAddr
r1, [r0,#VICVectAddrOffset]
Rev. 04 — 26 August 2009
;Disable irq, move to IRQ mode
;Restore SPSR from r12
;Acknowledge Non Vectored irq has finished
;Restore registers
;Return to the interrupted instruction
Chapter 35: LPC24XX RealMonitor
UM10237
© NXP B.V. 2009. All rights reserved.
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