LPC2460FET208,551 NXP Semiconductors, LPC2460FET208,551 Datasheet - Page 127

• Manufacturer Part Number: LPC2460FET208,551
• Description: IC ARM7 MCU ROMLESS 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2460FET208,551

• Program Memory Type: ROMless
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2C/I2S/SPI/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB2460, MCB2460U
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4260; 935283232551; LPC2460FET208-S

NXP Semiconductors
Table 120. Pin description
UM10237_4
User manual
Symbol
P0[23]/AD0[0]/
I2SRX_CLK/
CAP3[0]
P0[24]/AD0[1]/
I2SRX_WS/
CAP3[1]
P0[25]/AD0[2]/
I2SRX_SDA/
TXD3
P0[26]/AD0[3]/
AOUT/RXD3
P0[27]/SDA0
P0[28]/SCL0
P0[29]/USB_D+1
P0[30]/USB_D−1
P0[31]/USB_D+2
P1[0] to P1[31]
P1[0]/
ENET_TXD0
P1[1]/
ENET_TXD1
P1[2]/
ENET_TXD2/
MCICLK/
PWM0[1]
Ball
F5
E1
E4
D1
L3
M1
K5
N4
N1
B5
A5
B7
[4]
[2]
[2]
[2]
[5]
[1]
[1]
[1]
[2][3]
[5]
[5]
[4]
…continued
Type
I/O
I
I/O
I
I/O
I
I/O
I
I/O
I
I/O
O
I/O
I
O
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I/O
O
I/O
O
O
O
Description
P0[23] — General purpose digital input/output pin.
AD0[0] — A/D converter 0, input 0.
I2SRX_CLK — Receive Clock. It is driven by the master and received by the
slave. Corresponds to the signal SCK in the I
CAP3[0] — Capture input for Timer 3, channel 0.
P0[24] — General purpose digital input/output pin.
AD0[1] — A/D converter 0, input 1.
I2SRX_WS — Receive Word Select. It is driven by the master and received by
the slave. Corresponds to the signal WS in the I
CAP3[1] — Capture input for Timer 3, channel 1.
P0[25] — General purpose digital input/output pin.
AD0[2] — A/D converter 0, input 2.
I2SRX_SDA — Receive data. It is driven by the transmitter and read by the
receiver. Corresponds to the signal SD in the I
TXD3 — Transmitter output for UART3.
P0[26] — General purpose digital input/output pin.
AD0[3] — A/D converter 0, input 3.
AOUT — D/A converter output.
RXD3 — Receiver input for UART3.
P0[27] — General purpose digital input/output pin. Output is open-drain.
SDA0 — I
P0[28] — General purpose digital input/output pin. Output is open-drain.
SCL0 — I
P0[29] — General purpose digital input/output pin.
USB_D+1 — USB port 1 bidirectional D+ line.
P0[30] — General purpose digital input/output pin.
USB_D−1 — USB port 1 bidirectional D− line.
P0[31] — General purpose digital input/output pin.
USB_D+2 — USB port 2 bidirectional D+ line.
Port 1: Port 1 is a 32 bit I/O port with individual direction controls for each bit. The
operation of port 1 pins depends upon the pin function selected via the Pin
Connect block.
P1[0] — General purpose digital input/output pin.
ENET_TXD0 — Ethernet transmit data 0 (RMII/MII interface).
P1[1] — General purpose digital input/output pin.
ENET_TXD1 — Ethernet transmit data 1 (RMII/MII interface).
P1[2] — General purpose digital input/output pin.
ENET_TXD2 — Ethernet transmit data 2 (MII interface).
MCICLK — Clock output line for SD/MMC interface.
PWM0[1] — Pulse Width Modulator 0, output 1.
Rev. 04 — 26 August 2009
2
2
C0 clock input/output. Open-drain output (for I
C0 data input/output. Open-drain output (for I
Chapter 8: LPC24XX Pin configuration
2
S-bus specification.
2
S-bus specification.
2
S-bus specification.
2
2
C-bus compliance).
C-bus compliance).
UM10237
© NXP B.V. 2009. All rights reserved.
127 of 792