LPC2460FET208,551 NXP Semiconductors, LPC2460FET208,551 Datasheet - Page 509

IC ARM7 MCU ROMLESS 208TFBGA

LPC2460FET208,551

Manufacturer Part Number
LPC2460FET208,551
Description
IC ARM7 MCU ROMLESS 208TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets

Specifications of LPC2460FET208,551

Program Memory Type
ROMless
Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2C/I2S/SPI/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2460, MCB2460U
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4260
935283232551
LPC2460FET208-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC2460FET208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
Table 454. Format of automatically stored Rx messages
UM10237_4
User manual
Address
0
+4
+8
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
F
F
Rx Data 4
Rx Data 8
R
T
R
17.1 FullCAN message layout
0000
The FF, RTR, and DLC fields are as described in
Since the FullCAN message object section of the Look-up table RAM can be accessed
both by the Acceptance Filter and the CPU, there is a method for insuring that no CPU
reads from FullCAN message object occurs while the Acceptance Filter hardware is
writing to that object.
For this purpose the Acceptance Filter uses a 3-state semaphore, encoded with the two
semaphore bits SEM1 and SEM0 (see
messages”) for each message object. This mechanism provides the CPU with information
about the current state of the Acceptance Filter activity in the FullCAN message object
section.
The semaphore operates in the following manner:
Table 455. FullCAN semaphore operation
Prior to writing the first data byte into a message object, the Acceptance Filter will write
the FrameInfo byte into the according buffer location with SEM[1:0] = 01.
After having written the last data byte into the message object, the Acceptance Filter will
update the semaphore bits by setting SEM[1:0] = 11.
Before reading a message object, the CPU should read SEM[1:0] to determine the current
state of the Acceptance Filter activity therein. If SEM[1:0] = 01, then the Acceptance Filter
is currently active in this message object. If SEM[1:0] = 11, then the message object is
available to be read.
Before the CPU begins reading from the message object, it should clear SEM[1:0] = 00.
When the CPU is finished reading, it can check SEM[1:0] again. At the time of this final
check, if SEM[1:0] = 01 or 11, then the Acceptance Filter has updated the message object
during the time when the CPU reads were taking place, and the CPU should discard the
data. If, on the other hand, SEM[1:0] = 00 as expected, then valid data has been
successfully read by the CPU.
Figure 18–82
read from the message are all from the same received message.
SEM1
0
1
0
SEM
[1:0]
SEM0
1
1
0
0000
Rx Data 3
Rx Data 7
shows how software should use the SEM field to ensure that all three words
activity
Acceptance Filter is updating the content
Acceptance Filter has finished updating the content
CPU is in process of reading from the Acceptance Filter
Rev. 04 — 26 August 2009
DLC
Table 18–454 “Format of automatically stored Rx
00000
Rx Data 2
Rx Data 6
Chapter 18: LPC24XX CAN controllers CAN1/2
Table
18–428.
ID.28 ... ID.18
8
7
Rx Data 1
Rx Data 5
6
UM10237
© NXP B.V. 2009. All rights reserved.
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