DSPIC30F4011-20I/ML Microchip Technology, DSPIC30F4011-20I/ML Datasheet - Page 227

IC DSPIC MCU/DSP 48K 44QFN

DSPIC30F4011-20I/ML

Manufacturer Part Number
DSPIC30F4011-20I/ML
Description
IC DSPIC MCU/DSP 48K 44QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F4011-20I/ML

Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
48KB (16K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Core Frequency
40MHz
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
30
Flash Memory Size
48KB
Supply Voltage Range
2.5V To 5.5V
Operating Temperature Range
-40°C To
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F401120/ML

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F4011-20I/ML
Manufacturer:
Microchip Technology
Quantity:
135
M
Microchip Internet Web Site .............................................. 228
Modulo Addressing ............................................................. 34
Motor Control PWM Module................................................ 91
MPLAB ASM30 Assembler, Linker, Librarian ................... 168
MPLAB ICD 2 In-Circuit Debugger ................................... 169
MPLAB ICE 2000 High-Performance
MPLAB ICE 4000 High-Performance
MPLAB Integrated Development
MPLAB PM3 Device Programmer .................................... 169
MPLINK Object Linker/MPLIB Object Librarian ................ 168
O
Operating MIPS vs. Voltage.............................................. 171
Oscillator
Oscillator Selection ........................................................... 145
Output Compare Module..................................................... 81
P
Packaging ......................................................................... 213
PICSTART Plus Development Programmer ..................... 170
Pinout Descriptions
POR. See Power-on Reset.
Position Measurement Mode .............................................. 87
Power-Saving Modes ........................................................ 155
Power-Saving Modes (Sleep and Idle) ............................. 145
Program Address Space ..................................................... 21
© 2007 Microchip Technology Inc.
Applicability ................................................................. 36
Operation Example ..................................................... 35
Start and End Address................................................ 35
W Address Register Selection .................................... 35
Register Map............................................................. 101
Universal In-Circuit Emulator .................................... 169
Universal In-Circuit Emulator .................................... 169
Environment Software............................................... 167
Configurations........................................................... 148
Operating Modes (Table) .......................................... 146
During CPU Idle Mode ................................................ 83
During CPU Sleep Mode............................................. 83
Interrupts..................................................................... 83
Register Map............................................................... 84
Details ....................................................................... 215
Marking ..................................................................... 213
dsPIC30F4011 .............................................................. 9
dsPIC30F4012 ............................................................ 11
Idle ............................................................................ 156
Sleep......................................................................... 155
Construction................................................................ 22
Data Access From Program Memory
Data Access From, Address Generation .................... 22
Memory Map ............................................................... 21
Table Instructions
Fail-Safe Clock Monitor .................................... 150
Fast RC (FRC) .................................................. 149
Initial Clock Source Selection ........................... 148
Low-Power RC (LPRC)..................................... 149
LP ..................................................................... 149
Phase Locked Loop (PLL) ................................ 149
Start-up Timer (OST) ........................................ 148
Using Table Instructions ..................................... 23
TBLRDH ............................................................. 23
TBLRDL .............................................................. 23
TBLWTH ............................................................. 23
TBLWTL.............................................................. 23
Program Counter ................................................................ 14
Program Data Table Access (lsw) ...................................... 23
Program Data Table Access (MSB).................................... 24
Program Space Visibility
Programmable Digital Noise Filters .................................... 87
Programmer’s Model .......................................................... 14
Programming Operations.................................................... 47
Protection Against Accidental Writes to OSCCON ........... 150
PWM Duty Cycle Comparison Units ................................... 96
PWM Fault Pin.................................................................... 99
PWM Operation During CPU Idle Mode ........................... 100
PWM Operation During CPU Sleep Mode........................ 100
PWM Output and Polarity Control....................................... 99
PWM Output Override ........................................................ 98
PWM Period........................................................................ 94
PWM Special Event Trigger.............................................. 100
PWM Time Base................................................................. 93
PWM Update Lockout....................................................... 100
Q
QEI Module
Quadrature Encoder Interface (QEI)................................... 85
R
Reader Response............................................................. 229
Reset ........................................................................ 145, 151
Reset Sequence ................................................................. 41
dsPIC30F4011/4012
Window into Program Space Operation ..................... 25
Diagram ...................................................................... 15
Algorithm for Program Flash....................................... 47
Erasing a Row of Program Memory ........................... 47
Initiating the Programming Sequence ........................ 48
Loading Write Latches ................................................ 48
Duty Cycle Register Buffers ....................................... 96
Enable Bits ................................................................. 99
Fault States ................................................................ 99
Input Modes................................................................ 99
Output Pin Control ...................................................... 99
Complementary Output Mode .................................... 98
Synchronization .......................................................... 98
Postscaler................................................................. 100
Continuous Up/Down Count Modes ........................... 93
Double Update Mode.................................................. 94
Free-Running Mode.................................................... 93
Postscaler................................................................... 94
Prescaler .................................................................... 94
Single-Shot Mode ....................................................... 93
Operation During CPU Sleep Mode ........................... 87
Timer Operation During CPU Sleep Mode ................. 87
Interrupts .................................................................... 88
Logic ........................................................................... 86
Operation During CPU Idle Mode............................... 88
Register Map .............................................................. 89
Timer Operation During CPU Idle Mode..................... 88
BOR, Programmable ................................................ 153
Oscillator Start-up Timer (OST)................................ 145
POR.......................................................................... 151
Power-on Reset (POR)............................................. 145
Power-up Timer (PWRT) .......................................... 145
Programmable Brown-out Reset (BOR) ................... 145
Reset Sources ............................................................ 41
Cycle-by-Cycle ................................................... 99
Latched............................................................... 99
Long Crystal Start-up Time............................... 153
Operating Without FSCM and PWRT............... 153
DS70135E-page 225

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