DSPIC30F4011-20I/ML Microchip Technology, DSPIC30F4011-20I/ML Datasheet - Page 140
DSPIC30F4011-20I/ML
Manufacturer Part Number
DSPIC30F4011-20I/ML
Description
IC DSPIC MCU/DSP 48K 44QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F4012-30ISO.pdf
(238 pages)
2.DSPIC30F4012-30ISO.pdf
(18 pages)
3.DSPIC30F4012-30ISO.pdf
(6 pages)
4.DSPIC30F4012-30ISO.pdf
(16 pages)
5.DSPIC30F4012-30ISO.pdf
(22 pages)
6.DSPIC30F4011-20IML.pdf
(236 pages)
Specifications of DSPIC30F4011-20I/ML
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
48KB (16K x 24)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Core Frequency
40MHz
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
30
Flash Memory Size
48KB
Supply Voltage Range
2.5V To 5.5V
Operating Temperature Range
-40°C To
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44QFN2 - SOCKET TRAN ICE 44QFN/40DIPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F401120/ML
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F4011-20I/ML
Manufacturer:
Microchip Technology
Quantity:
135
- DSPIC30F4012-30ISO PDF datasheet
- DSPIC30F4012-30ISO PDF datasheet #2
- DSPIC30F4012-30ISO PDF datasheet #3
- DSPIC30F4012-30ISO PDF datasheet #4
- DSPIC30F4012-30ISO PDF datasheet #5
- DSPIC30F4011-20IML PDF datasheet #6
- Current page: 140 of 236
- Download datasheet (4Mb)
values for the conversion speeds above 500 ksps, since
dsPIC30F4011/4012
The configuration guidelines give the required setup
they require external V
some differences in the configuration procedure. Config-
uration details that are not critical to the conversion
speed have been omitted.
FIGURE 20-2:
20.7.1
The configuration for 1 Msps operation is dependent on
whether a single input pin is to be sampled or whether
multiple pins are to be sampled.
20.7.1.1
For conversions at 1 Msps for a single analog input, at
least two sample and hold channels must be enabled.
The analog input multiplexer must be configured so
that the same input pin is connected to both sample
and hold channels. The A/D converts the value held on
one S/H channel while the second S/H channel
acquires a new input sample.
DS70135E-page 138
R2
10
V
1 Msps CONFIGURATION
GUIDELINE
DD
Single Analog Input
C2
0.1 μF
A/D CONVERTER VOLTAGE REFERENCE SCHEMATIC
V
REF
DD
C1
0.01 μF
pins usage and there are
1
V
V
11
SS
DD
dsPIC30F4011
V
DD
V
DD
R1
10
V
V
33
DD
23
SS
Figure 20-2 depicts the recommended circuit for the
conversion rates above 500 ksps.
20.7.1.2
The ADC can also be used to sample multiple analog
inputs using multiple sample and hold channels. In this
case, the total 1 Msps conversion rate is divided among
the different input signals. For example, four inputs can
be sampled at a rate of 250 ksps for each signal, or two
inputs could be sampled at a rate of 500 ksps for each
signal. Sequential sampling must be used in this
configuration to allow adequate sampling time on each
input.
V
Multiple Analog Inputs
DD
V
V
DD
DD
C8
1 μF
C5
1 μF
© 2007 Microchip Technology Inc.
V
V
DD
DD
C7
0.1 μF
C4
0.1 μF
V
V
DD
DD
C6
0.01 μF
C3
0.01 μF
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