AT32UC3A0128-ALUR Atmel, AT32UC3A0128-ALUR Datasheet - Page 345

• Manufacturer Part Number: AT32UC3A0128-ALUR
• Description: MCU AVR32 128K FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A0128-ALUR

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 109
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Package: 144LQFP
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 69
• Interface Type: Ethernet/I2S/JTAG/SPI/TWI/USART
• Number Of Timers: 3
• For Use With: ATEVK1105 - KIT EVAL FOR AT32UC3A0ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

• PAR: Parity Type
• SYNC/CPHA: Synchronous Mode Select or SPI Clock Phase
SYNC = 0: USART operates in Asynchronous Mode.
SYNC = 1: USART operates in Synchronous Mode.
CPHA = 0: Data is changed on the leading edge of SPCK and captured on the following edge of SPCK.
CPHA = 1: Data is captured on the leading edge of SPCK and changed on the following edge of SPCK.
CPHA determines which edge of SPCK causes data to change and which edge causes data to be captured. CPHA is used
with CPOL to produce the required clock/data relationship between master and slave devices.
• CHRL: Character Length.
• USCLKS: Clock Selection
32058J–AVR32–04/11
0
1
1
0
0
0
0
1
1
– If USART does not operate in SPI Mode (MODE is … 0xE and 0xF):
– If USART operates in SPI Mode (MODE = 0xE or 0xF):
0
0
1
1
0
0
1
1
USCLKS
CHRL
PAR
1
0
1
0
0
1
1
0
1
0
1
0
1
1.5 stop bits
2 stop bits
Reserved
0
1
0
1
0
1
0
1
x
x
Character Length
5 bits
6 bits
7 bits
8 bits
Parity Type
Even parity
Odd parity
Parity forced to 0 (Space)
Parity forced to 1 (Mark)
No parity
Multidrop mode
Selected Clock
CLK_USART
CLK_USART
Reserved
CLK
/DIV (DIV = xx)
Reserved
2 stop bits
Reserved
AT32UC3A
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