AT32UC3A0128-ALUR Atmel, AT32UC3A0128-ALUR Datasheet - Page 153

• Manufacturer Part Number: AT32UC3A0128-ALUR
• Description: MCU AVR32 128K FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A0128-ALUR

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 109
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Package: 144LQFP
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 66 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 69
• Interface Type: Ethernet/I2S/JTAG/SPI/TWI/USART
• Number Of Timers: 3
• For Use With: ATEVK1105 - KIT EVAL FOR AT32UC3A0ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

21. Peripheral DMA Controller (PDCA)
21.1
21.2
32058J–AVR32–04/11
Features
Overview
rev: 1.0.0.0
•
•
The Peripheral DMA controller (PDCA) transfers data between on-chip peripheral modules such
as USART, SPI, SSC and on- and off-chip memories. Using the PDCA avoids CPU intervention
for data transfers, improving the performance of the microcontroller. The PDCA can transfer
data from memory to a peripheral or from a peripheral to memory.
The PDCA consists of a number of DMA channels. Each channel has:
The PDCA communicates with the peripheral modules over a number of handshake interfaces.
The peripheral signals to the PDCA when it is ready to receive or transmit data. The PDCA
acknowledges the request when the transmission has started.
The number of handshake-interfaces may be higher than the number of DMA channels. If this is
the case, the DMA channel must be programmed to use the desired interface.
When a transmit buffer is empty or a receive buffer is full, an interrupt request can be signalled.
• A 32-bit memory pointer
• A 16-bit transfer counter
• A 32-bit memory pointer reload value
• A 16-bit transfer counter reload value
Generates Transfers to/from Peripherals such as USART, SSC and SPI
Two address pointers/counters per channel allowing double buffering
AT32UC3A
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