ATMEGA32U4-MUR Atmel, ATMEGA32U4-MUR Datasheet - Page 307

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ATMEGA32U4-MUR

Manufacturer Part Number
ATMEGA32U4-MUR
Description
MCU AVR 16K FLASH 16MHZ 44VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA32U4-MUR

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA32U4-MUR
Manufacturer:
UCC
Quantity:
1 001
24.9
24.9.1
7766F–AVR–11/10
ADC Register Description
ADC Multiplexer Selection Register – ADMUX
Example 2:
• Bit 7:6 – REFS1:0: Reference Selection Bits
These bits select the voltage reference for the ADC, as shown in
changed during a conversion, the change will not go in effect until this conversion is complete
(ADIF in ADCSRA is set). The internal voltage reference options may not be used if an external
reference voltage is being applied to the AREF pin.
Table 24-3.
• Bit 5 – ADLAR: ADC Left Adjust Result
The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register.
Write one to ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the
ADLAR bit will affect the ADC Data Register immediately, regardless of any ongoing conver-
sions. For a complete description of this bit, see
page
• Bits 4:0 – MUX4:0: Analog Channel Selection Bits
The value of these bits selects which combination of analog inputs are connected to the ADC.
These bits also select the gain for the differential channels. See
bits are changed during a conversion, the change will not go in effect until this conversion is
complete (ADIF in ADCSRA is set).
Bit
Read/Write
Initial Value
REFS1
0
0
1
1
– ADCL will thus read 0x00, and ADCH will read 0x9C.
– ADMUX = 0xF0, MUX5 = 0 (ADC0 - ADC1, 1x gain, 2.56V reference, left adjusted
– Voltage on ADC0 is 300 mV, voltage on ADC1 is 500 mV.
– ADCR = 512 * 1 * (300 - 500) / 2560 = -41 = 0x029.
– ADCL will thus read 0x40, and ADCH will read 0x0A.
311.
Writing zero to ADLAR right adjusts the result: ADCL = 0x70, ADCH = 0x02.
result)
Writing zero to ADLAR right adjusts the result: ADCL = 0x00, ADCH = 0x29.
REFS0
REFS1
0
1
0
1
Voltage Reference Selections for ADC
R/W
7
0
Voltage Reference Selection
AREF, Internal Vref turned off
AV
Reserved
Internal 2.56V Voltage Reference with external capacitor on AREF pin
REFS0
R/W
CC
6
0
with external capacitor on AREF pin
ADLAR
R/W
5
0
MUX4
R/W
4
0
MUX3
R/W
“The ADC Data Register – ADCL and ADCH” on
3
0
MUX2
R/W
2
0
MUX1
R/W
ATmega16/32U4
1
0
Table 24-4
Table
MUX0
R/W
0
0
24-3. If these bits are
for details. If these
ADMUX
307

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