ATMEGA32U4-MUR Atmel, ATMEGA32U4-MUR Datasheet - Page 165

• Manufacturer Part Number: ATMEGA32U4-MUR
• Description: MCU AVR 16K FLASH 16MHZ 44VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA32U4-MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 26
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-VQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.12.2
7766F–AVR–11/10
TCCR4B – Timer/Counter4 Control Register B
value. The automatic action programmed in COM4A1 and COM4A0 takes place as if a compare
match had occurred, but no interrupt is generated. The FOC4A bit is always read as zero.
• Bit 2 - FOC4B: Force Output Compare Match 4B
The FOC4B bit is only active when the PWM4B bit specify a non-PWM mode.
Writing a logical one to this bit forces a change in the Waveform Output (OCW4B) and the Out-
put Compare pin (OC4B) according to the values already set in COM4B1 and COM4B0. If
COM4B1 and COM4B0 written in the same cycle as FOC4B, the new settings will be used. The
Force Output Compare bit can be used to change the output pin value regardless of the timer
value. The automatic action programmed in COM4B1 and COM4B0 takes place as if a compare
match had occurred, but no interrupt is generated.
The FOC4B bit is always read as zero.
• Bit 1 - PWM4A: Pulse Width Modulator A Enable
When set (one) this bit enables PWM mode based on comparator OCR4A
• Bit 0 - PWM4B: Pulse Width Modulator B Enable
When set (one) this bit enables PWM mode based on comparator OCR4B.
• Bit 7 - PWM4X: PWM Inversion Mode
When this bit is set (one), the PWM Inversion Mode is selected and the Dead Time Generator
outputs, OC4x and OC4x are inverted.
• Bit 6 - PSR4: Prescaler Reset Timer/Counter4
When this bit is set (one), the Timer/Counter4 prescaler (TCNT4 is unaffected) will be reset. The
bit will be cleared by hardware after the operation is performed. Writing a zero to this bit will have
no effect. This bit will always read as zero.
• Bits 5,4 - DTPS41, DTPS40: Dead Time Prescaler Bits
The Timer/Counter4 Control Register B is a 8-bit read/write register.
The dedicated Dead Time prescaler in front of the Dead Time Generator can divide the
Timer/Counter4 clock (PCK or CK) by 1, 2, 4 or 8 providing a large range of dead times that can
be generated. The Dead Time prescaler is controlled by two bits DTPS41 and DTPS40 from the
Dead Time Prescaler register. These bits define the division factor of the Dead Time prescaler.
The division factors are given in
Bit
Read/Write
Initial value
PWM4X
R/W
7
0
PSR4
R/W
6
0
Table
DTPS41
R/W
5
0
15-14.
DTPS40
R/W
4
0
CS43
R/W
3
0
CS42
R/W
2
0
ATmega16/32U4
CS41
R/W
1
0
CS40
R/W
0
0
TCCR4B
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