ATMEGA32U4-MUR Atmel, ATMEGA32U4-MUR Datasheet - Page 348

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ATMEGA32U4-MUR

Manufacturer Part Number
ATMEGA32U4-MUR
Description
MCU AVR 16K FLASH 16MHZ 44VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA32U4-MUR

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA32U4-MUR
Manufacturer:
UCC
Quantity:
1 001
7766F–AVR–11/10
Table 28-4.
Note:
Table 28-5.
Note:
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if
Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.
Fuse High Byte
OCDEN
JTAGEN
SPIEN
WDTON
EESAVE
BOOTSZ1
BOOTSZ0
BOOTRST
Fuse Low Byte
CKDIV8
CKOUT
SUT1
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
(1)
1. The SPIEN Fuse is not accessible in serial programming mode.
2. The default value of BOOTSZ1..0 results in maximum Boot Size. See
3. See
4. Never ship a product with the OCDEN Fuse programmed regardless of the setting of Lock bits
1. The default setting of CKSEL3..0 results in Low Power Crystal Oscillator for ATmega16U4 and
2. The CKOUT Fuse allow the system clock to be output on PORTC7. See
3. See
(2)
(4)
(3)
(3)
for details.
and JTAGEN Fuse. A programmed OCDEN Fuse enables some parts of the clock system to
be running in all sleep modes. This may increase the power consumption.
ATmega32U4, and Internal RC oscillator for ATmega16U4RC and ATmega32U4RC. See
Table 6-1 on page 28
on page 37
Fuse High Byte
Fuse Low Byte
“Watchdog Timer” on page 55
“System Clock Prescaler” on page 37
Bit Nr
7
6
5
4
3
2
1
0
for details.
Bit No
7
6
5
4
3
2
1
0
Description
Divide clock by 8
Clock output
Select start-up time
Select start-up time
Select Clock source
Select Clock source
Select Clock source
Select Clock source
for details.
Description
Enable OCD
Enable JTAG
Enable Serial Program and Data
Downloading
Watchdog Timer always on
EEPROM memory is preserved
through the Chip Erase
Select Boot Size (see
for details)
Select Boot Size (see
for details)
Select Bootloader Address as
Reset Vector
for details.
ATmega16U4/32U4
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
0 (programmed)
for details.
Table 28-7
Table 28-7
1 (unprogrammed)
1 (unprogrammed)
(1)
0 (programmed)
0 (programmed)
ATmega16/32U4
Default Value
(1)
(1)
(1)
Default Value
1 (unprogrammed, OCD
disabled)
0 (programmed, JTAG
enabled)
0 (programmed, SPI prog.
enabled)
1 (unprogrammed)
1 (unprogrammed, EEPROM
preserved)
0 (programmed)
0 (programmed)
1 (unprogrammed, Reset
vector @0x0000)
ATmega16U4RC/32U4RC
0 (programmed)
0 (programmed)
1 (unprogrammed)
0 (programmed)
Table 27-8 on page 344
“Clock Output Buffer”
(2)
(2)
(1)
(1)
(1)
(1)
348

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