ATTINY48-MMU Atmel, ATTINY48-MMU Datasheet - Page 197

MCU AVR 5K FLASH 12MHZ 28-QFN

ATTINY48-MMU

Manufacturer Part Number
ATTINY48-MMU
Description
MCU AVR 5K FLASH 12MHZ 28-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY48-MMU

Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
24
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
ATTINY4x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
2-Wire, I2S, SPI
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Package
28VQFN EP
Device Core
AVR
Family Name
ATtiny
Maximum Speed
12 MHz
Operating Supply Voltage
2.5|3.3|5 V
For Use With
ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
21.2.6
8008G–AVR–04/11
Reading the Flash
programmed simultaneously. The programming algorithm for the EEPROM data memory is as
follows (refer to
Data loading):
EEPROM programming waveforms are illustrated in
and letters refer to the programming steps described above.
Figure 21-4. Programming the EEPROM Waveforms
The algorithm for reading the Flash memory is as follows (see
194
RESET +12V
• A: Load command “0001 0001”
• G: Load address high byte (0x00 – 0xFF)
• B: Load address low byte (0x00 – 0xFF)
• C: Load data (0x00 – 0xFF)
• E: Latch data (give PAGEL a positive pulse)
• K: Repeat steps B, C, and E until the entire buffer is filled
• L: Program EEPROM page:
• A: Load command “0000 0010”
• G: Load address high byte (0x00 – 0xFF)
• B: Load address low byte (0x00 – 0xFF)
• Set OE to “0”, and BS1 to “0”. The Flash word low byte can now be read at DATA
RDY/BSY
PAGEL
for details on command and address loading):
DATA
CLKI
XA1
XA0
BS1
BS2
– Set BS1 to “0”
– Give WR a negative pulse. This starts programming of the EEPROM page.
– Wait until to RDY/BSY goes high before programming the next page (See
WR
OE
RDY/BSY goes low
4
for signal waveforms)
0x11
A
“Programming the Flash” on page 194
ADDR. HIGH
G
ADDR. LOW
B
DATA
C
XX
E
ADDR. LOW
B
Figure
for details on Command, Address and
DATA
C
K
21-4, where XX means “don’t care”
“Programming the Flash” on page
XX
E
ATtiny48/88
L
Figure 21-
197

Related parts for ATTINY48-MMU