ATTINY48-AUR Atmel, ATTINY48-AUR Datasheet - Page 86

• Manufacturer Part Number: ATTINY48-AUR
• Description: MCU AVR 4KB FLASH 12MHZ 32TQFP
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY48-AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 28
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.8.2
11.8.3
86
ATtiny48/88
TCNT0 – Timer/Counter Register
OCR0A – Output Compare Register A
Table 11-2.
Notes:
• Bits 2:0 – CS0[2:0]: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter.
Table 11-3.
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes) the Compare
Match on the following timer clock. Modifying the counter (TCNT0) while the counter is running,
introduces a risk of missing a Compare Match between TCNT0 and the OCR0x Registers.
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNT0). A match can be used to generate an Output Compare interrupt.
Bit
0x26 (0x46)
Read/Write
Initial Value
Bit
0x27 (0x47)
Read/Write
Initial Value
CS02
Mode
0
0
0
0
1
1
1
1
0
1
1. MAX
CS01
0
0
1
1
0
0
1
1
CTC Mode Bit Description
Clock Select Bit Description
R/W
R/W
CTC0
7
0
7
0
0
1
CS00
= 0xFF
0
1
0
1
0
1
0
1
R/W
R/W
6
0
6
0
Timer/Counter
Mode of Operation
Normal
CTC
Description
No clock source (Timer/Counter stopped)
clk
clk
clk
clk
clk
External clock source on T0 pin. Clock on falling edge.
External clock source on T0 pin. Clock on rising edge.
I/O
I/O
I/O
I/O
I/O
/8 (From prescaler)
/64 (From prescaler)
/256 (From prescaler)
/1024 (From prescaler)
(No prescaling)
R/W
R/W
5
0
5
0
R/W
R/W
4
0
4
0
OCR0A[7:0]
TCNT0[7:0]
OCRA
0xFF
TOP
R/W
R/W
3
0
3
0
R/W
R/W
2
0
2
0
Update of
Immediate
Immediate
OCRx at
R/W
R/W
1
0
1
0
R/W
R/W
TOV Flag
0
0
0
0
Set on
8008G–AVR–04/11
MAX
MAX
(1)
OCR0A
TCNT0