M30625FGPGP#U7C Renesas Electronics America, M30625FGPGP#U7C Datasheet - Page 408
![IC M16C MCU FLASH 256K 128LQFP](/photos/12/29/122954/m30625fgpgp_u7c_sml.jpg)
M30625FGPGP#U7C
Manufacturer Part Number
M30625FGPGP#U7C
Description
IC M16C MCU FLASH 256K 128LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets
1.QSK-62P_PLUS.pdf
(103 pages)
2.M30622SAFPU5.pdf
(308 pages)
3.M30620SPGPU3C.pdf
(423 pages)
Specifications of M30625FGPGP#U7C
Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-LQFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Rev.
1.0
REVISION HISTORY
Jan 31, 2003
Date
Page
11
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1
2
5
Applications are partly revised.
Table 1.1.1 is partly revised.
Table 1.1.3 is partly revised.
Figure 1.1.2 is partly revised.
Explanation of “Memory” is partly revised.
Explanation of “Hardware Reset 1” is partly revised.
Figure 1.5.1 is partly revised.
Figure 1.5.2 is partly revised.
Figure 1.5.4 is partly revised.
VCR2 Register in Figure 1.5.6 is partly revised.
Figure 1.5.6 is partly revised.
Explanation of “Power Supply Down Detection Interrupt” is partly revised.
Figure 1.6.1 is partly revised.
Figure 1.6.2 is partly revised.
Table 1.7.5 is partly revised.
Table 1.7.7 is partly revised.
Figure 1.7.8 is partly revised.
Explanation of “4 Mbyte Mode” is partly revised.
Notes 12 and 13 in Figure 1.9.2 is partly revised.
Notes 2 and 5 in Figure 1.9.3 is partly revised.
Figure 1.9.4 is partly revised.
Note 4 in Figure 1.9.6 is partly revised.
Explanation of “PLL Clock” is partly revised.
Figure 1.9.9 is partly revised.
Explanation of “CPU Clock and BCLK” is partly revised.
Explanation of “Low-speed Mode” is partly revised.
Explanation of “Low Power Dissipation Mode” is partly revised.
Explanation of “Low Power Dissipation Mode” is partly revised.
Explanation of “On-chip Oscillator Low Power Dissipation Mode” is partly
revised.
Table 1.9.3 is partly revised.
Table 1.9.5 is partly revised.
Figure 1.9.10 is partly revised.
Figure 1.9.11 is partly revised.
Table 1.9.7 is added.
Explanation of “System Clock Protective Function” is partly revised.
Explanation of “Power Supply Down Detection Interrupt” is partly revised.
Table 1.11.1 is partly revised.
M16C/62P Group (M16C/62P, M16C/62PT) Hardware Manual
C - 1
Description
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