M30625FGPGP#U7C Renesas Electronics America, M30625FGPGP#U7C Datasheet - Page 356
![IC M16C MCU FLASH 256K 128LQFP](/photos/12/29/122954/m30625fgpgp_u7c_sml.jpg)
M30625FGPGP#U7C
Manufacturer Part Number
M30625FGPGP#U7C
Description
IC M16C MCU FLASH 256K 128LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets
1.QSK-62P_PLUS.pdf
(103 pages)
2.M30622SAFPU5.pdf
(308 pages)
3.M30620SPGPU3C.pdf
(423 pages)
Specifications of M30625FGPGP#U7C
Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
128-LQFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Manufacturer
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M16C/62P Group (M16C/62P, M16C/62PT)
Rev.2.41
REJ09B0185-0241
Figure 23.15
Memory Expansion Mode, Microprocessor Mode
(Common to setting with wait and setting without wait)
WR, WRL, WRH
WR, WRL, WRH
RDY input
(Effective for setting with wait)
(Separate bus)
RD
BCLK
RD
(Separate bus)
BCLK
HOLD input
HLDA output
P0, P1, P2,
P3, P4,
P5_0 to P5_2
(Multiplexed bus)
(Multiplexed bus)
NOTES:
Jan 10, 2006
1. These pins are set to high-impedance regardless of the input level of the
BYTE pin, PM06 bit in PM0 register and PM11 bit in PM1 register.
Timing Diagram (3)
(1)
Measuring conditions :
· V
· Input timing voltage : Determined with V
· Output timing voltage : Determined with V
CC1
t
su(HOLD − BCLK)
=V
Page 339 of 390
CC2
=3V
t
d(BCLK − HLDA)
t
su(RDY − BCLK)
t
h(BCLK − HOLD)
Hi
−
Z
t
d(BCLK − HLDA)
IL
=0.6V, V
OL
=1.5V, V
IH
=2.4V
OH
=1.5V
V
t
h(BCLK − RDY)
CC1
23. Electrical Characteristics
=V
CC2
=3V
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