MC56F8013VFAE Freescale Semiconductor, MC56F8013VFAE Datasheet - Page 117

IC DIGITAL SIGNAL CTLR 32-LQFP

MC56F8013VFAE

Manufacturer Part Number
MC56F8013VFAE
Description
IC DIGITAL SIGNAL CTLR 32-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8013VFAE

Core Processor
56800
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
26
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
2K x 16
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
32-LQFP
Product
DSCs
Data Bus Width
16 bit
Processor Series
MC56F80xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
32 MIPs
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
26
Data Ram Size
4 KB
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Rom Size
16 KB
Development Tools By Supplier
MC56F8037EVM, DEMO56F8014-EE, DEMO56F8013-EE
Interface Type
SCI, SPI, I2C
Minimum Operating Temperature
- 40 C
For Use With
CPA56F8013 - BOARD SOCKET FOR MC56F8013APMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEMDEMO56F8013-EE - BOARD DEMO FOR 56F8013
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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frequency.
B, the internal [state-dependent component], reflects the supply current required by certain on-chip
resources only when those resources are in use. These include RAM, Flash memory and the ADCs.
C, the internal [dynamic component], is classic C*V
56800E core and standard cell logic.
D, the external [dynamic component], reflects power dissipated on-chip as a result of capacitive loading
on the external pins of the chip. This is also commonly described as C*V
of the I/O cell types used on the 56800E reveal that the power-versus-load curve does have a non-zero
Y-intercept.
Power due to capacitive loading on output pins is (first order) a function of the capacitive load and
frequency at which the outputs change.
in the I/O cells as a function of capacitive load. In these cases:
where:
Because of the low duty cycle on most device pins, power dissipation due to capacitive loads was found
to be fairly low when averaged over a period of time.
E, the external [static component], reflects the effects of placing resistive loads on the outputs of the
device. Sum the total of all V
for the purposes of these rough calculations. For instance, if there is a total of eight PWM outputs driving
10mA into LEDs, then P = 8*.5*.01 = 40mW.
In previous discussions, power consumption due to parasitics associated with pure input pins is ignored,
as it is assumed to be negligible.
Freescale Semiconductor
Summation is performed over all output pins with capacitive loads
TotalPower is expressed in mW
Cload is expressed in pF
TotalPower = Σ((Intercept + Slope*Cload)*frequency/10MHz)
Table 10-20 I/O Loading Coefficients at 10MHz
8mA drive
4mA drive
2
/R or IV to arrive at the resistive load contribution to power. Assume V = 0.5
56F8013/56F8011 Data Sheet, Rev. 12
Table 10-20
provides coefficients for calculating power dissipated
2
Intercept
1.15mW
*F CMOS power dissipation corresponding to the
1.3
0.11mW / pF
0.11mW / pF
Slope
2
*F, although simulations on two
Power Consumption
117

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