MC56F8002VWL Freescale Semiconductor, MC56F8002VWL Datasheet - Page 66

• Manufacturer Part Number: MC56F8002VWL
• Description: DSC 12K FLASH 32MHZ 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8002VWL

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 12KB (6K x 16)
• Program Memory Type: FLASH
• Ram Size: 1K x 16
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 15x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-SOIC
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: MC56F80xx
• Core: 56800E
• Instruction Set Architecture: Dual Harvard
• Device Million Instructions Per Second: 32 MIPs
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 40
• Data Ram Size: 2 KB
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MC56F8006DEMO, APMOTOR56F8000E
• Interface Type: LIN, I2C, SCI, SPI
• Minimum Operating Temperature: - 40 C
• For Use With: APMOTOR56F8000E - KIT DEMO MOTOR CTRL SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Specifications
Power consumption is given by the following equation:
A, the internal [static] component, is comprised of the DC bias currents for the oscillator, leakage currents, PLL, and voltage
references. These sources operate independently of processor state or operating frequency.
B, the internal [state-dependent] component, reflects the supply current required by certain on-chip resources only when those
resources are in use. These include RAM, flash memory, and the ADCs.
C, the internal [dynamic] component, is classic C*V
standard cell logic.
D, the external [dynamic] component, reflects power dissipated on-chip as a result of capacitive loading on the external pins of
the chip. This is also commonly described as C*V
reveal that the power-versus-load curve does have a non-zero Y-intercept.
Power due to capacitive loading on output pins is (first order) a function of the capacitive load and frequency at which the
outputs change.
In these cases:
where:
Because of the low duty cycle on most device pins, power dissipation due to capacitive loads was found to be fairly low when
averaged over a period of time.
E, the external [static component], reflects the effects of placing resistive loads on the outputs of the device. Sum the total of
all V
For instance, if there is a total of eight PWM outputs driving 10 mA into LEDs, then P = 8*0.5*0.01 = 40 mW.
In previous discussions, power consumption due to parasitics associated with pure input pins is ignored, as it is assumed to be
negligible.
66
•
•
•
2
/R or IV to arrive at the resistive load contribution to power. Assume V = 0.5 for the purposes of these rough calculations.
Summation is performed over all output pins with capacitive loads
Total power is expressed in mW
C
load
is expressed in pF
Table 38
TotalPower = ((Intercept + Slope*Cload)*frequency/10 MHz)
provides coefficients for calculating power dissipated in the I/O cells as a function of capacitive load.
MC56F8006/MC56F8002 Digital Signal Controller, Rev. 3
Total power =
Table 38. I/O Loading Coefficients at 10 MHz
8 mA drive
4 mA drive
2
*F, although simulations on two of the I/O cell types used on the 56800E
+C:
+D:
+B: internal [state-dependent component]
+E:
2
A:
*F CMOS power dissipation corresponding to the 56800E core and
external [dynamic component]
internal [dynamic component]
external [static component]
internal [static component]
Intercept
1.15 mW
1.3
0.11 mW/pF
0.11 mW/pF
Slope
Freescale Semiconductor
Eqn. 1
Eqn. 2