LPC1113FHN33/301,5 NXP Semiconductors, LPC1113FHN33/301,5 Datasheet - Page 60

IC MCU 32BIT 24KB FLASH 33HVQFN

LPC1113FHN33/301,5

Manufacturer Part Number
LPC1113FHN33/301,5
Description
IC MCU 32BIT 24KB FLASH 33HVQFN
Manufacturer
NXP Semiconductors
Series
LPC1100r

Specifications of LPC1113FHN33/301,5

Program Memory Type
FLASH
Program Memory Size
24KB (24K x 8)
Package / Case
33-VQFN Exposed Pad, 33-HVQFN, 33-SQFN, 33-DHVQFN
Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
28
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC11
Core
ARM Cortex M0
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, SPI, UART
Number Of Programmable I/os
28
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
LPC1100
Device Core
ARM Cortex M0
Device Core Size
32b
Frequency (max)
50MHz
Total Internal Ram Size
8KB
# I/os (max)
42
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
33
Package Type
HVQFN EP
Package
33HVQFN EP
Family Name
LPC1100
Maximum Speed
50 MHz
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4951
935290776551
NXP Semiconductors
17. Contents
1
2
3
4
4.1
5
6
6.1
6.2
7
7.1
7.2
7.3
7.4
7.5
7.5.1
7.5.2
7.6
7.7
7.7.1
7.8
7.8.1
7.9
7.9.1
7.10
7.10.1
7.11
7.11.1
7.12
7.12.1
7.13
7.14
7.14.1
7.15
7.15.1
7.15.1.1
7.15.1.2
7.15.1.3
7.15.2
7.15.3
7.15.4
7.15.5
7.15.5.1
7.15.5.2
7.15.5.3
7.16
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pinning information . . . . . . . . . . . . . . . . . . . . . . 5
Functional description . . . . . . . . . . . . . . . . . . 18
On-chip flash program memory . . . . . . . . . . . 18
Nested Vectored Interrupt Controller (NVIC) . 19
Fast general purpose parallel I/O . . . . . . . . . . 20
I
General purpose external event
counter/timers . . . . . . . . . . . . . . . . . . . . . . . . . 22
Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 8
ARM Cortex-M0 processor . . . . . . . . . . . . . . . 18
On-chip SRAM . . . . . . . . . . . . . . . . . . . . . . . . 18
Memory map. . . . . . . . . . . . . . . . . . . . . . . . . . 18
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Interrupt sources. . . . . . . . . . . . . . . . . . . . . . . 20
IOCONFIG block . . . . . . . . . . . . . . . . . . . . . . 20
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
SPI serial I/O controller. . . . . . . . . . . . . . . . . . 21
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
10-bit ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
System tick timer . . . . . . . . . . . . . . . . . . . . . . 23
Watchdog timer. . . . . . . . . . . . . . . . . . . . . . . . 23
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Clocking and power control . . . . . . . . . . . . . . 24
Crystal oscillators . . . . . . . . . . . . . . . . . . . . . . 24
Internal RC oscillator . . . . . . . . . . . . . . . . . . . 24
System oscillator . . . . . . . . . . . . . . . . . . . . . . 25
Watchdog oscillator . . . . . . . . . . . . . . . . . . . . 25
System PLL . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Clock output . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Wake-up process . . . . . . . . . . . . . . . . . . . . . . 25
Power control . . . . . . . . . . . . . . . . . . . . . . . . . 25
Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Deep-sleep mode . . . . . . . . . . . . . . . . . . . . . . 26
Deep power-down mode . . . . . . . . . . . . . . . . 26
System control . . . . . . . . . . . . . . . . . . . . . . . . 26
2
C-bus serial I/O controller . . . . . . . . . . . . . . 21
7.16.1
7.16.2
7.16.3
7.16.4
7.16.5
7.16.6
7.16.7
7.17
8
9
9.1
9.2
9.3
9.4
10
10.1
10.2
10.3
10.4
10.5
10.6
11
11.1
11.2
11.3
11.4
11.5
12
13
14
15
15.1
15.2
15.3
15.4
16
17
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 29
Static characteristics . . . . . . . . . . . . . . . . . . . 30
Dynamic characteristics. . . . . . . . . . . . . . . . . 43
Application information . . . . . . . . . . . . . . . . . 49
Package outline. . . . . . . . . . . . . . . . . . . . . . . . 53
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 56
Revision history . . . . . . . . . . . . . . . . . . . . . . . 57
Legal information . . . . . . . . . . . . . . . . . . . . . . 58
Contact information . . . . . . . . . . . . . . . . . . . . 59
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Start logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Brownout detection . . . . . . . . . . . . . . . . . . . . 27
Code security
(Code Read Protection - CRP) . . . . . . . . . . . 27
APB interface . . . . . . . . . . . . . . . . . . . . . . . . . 27
AHBLite . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
External interrupt inputs . . . . . . . . . . . . . . . . . 28
Emulation and debugging . . . . . . . . . . . . . . . 28
BOD static characteristics . . . . . . . . . . . . . . . 35
Power consumption . . . . . . . . . . . . . . . . . . . 35
Peripheral power consumption . . . . . . . . . . . 39
Electrical pin characteristics. . . . . . . . . . . . . . 40
Flash memory . . . . . . . . . . . . . . . . . . . . . . . . 43
External clock. . . . . . . . . . . . . . . . . . . . . . . . . 43
Internal oscillators . . . . . . . . . . . . . . . . . . . . . 44
I/O pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
I
SPI interfaces. . . . . . . . . . . . . . . . . . . . . . . . . 46
ADC usage notes. . . . . . . . . . . . . . . . . . . . . . 49
XTAL input . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
XTAL Printed Circuit Board (PCB) layout
guidelines. . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Standard I/O pad configuration . . . . . . . . . . . 51
Reset pad configuration . . . . . . . . . . . . . . . . . 52
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 58
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 59
2
C-bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
32-bit ARM Cortex-M0 microcontroller
LPC1111/12/13/14
Document identifier: LPC1111_12_13_14
Date of release: 18 August 2010
All rights reserved.

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