M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 511
![IC M32C MCU FLASH 100LQFP](/photos/12/22/122251/m30853fjgp_u3_sml.jpg)
M30853FJGP#U3
Manufacturer Part Number
M30853FJGP#U3
Description
IC M32C MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(364 pages)
2.M30853FHFPD5.pdf
(94 pages)
3.M30853FHFPU3.pdf
(544 pages)
Specifications of M30853FJGP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30853FJGP#U3M30853FJGP#D5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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M
R
R
27.13 Programmable I/O Ports
e
E
3
. v
J
2
NOTES :
1
m
0
0
c
C
Table 27.4 INVC0 Register and the NMI Pin
1
9
o
t o
u (
n (
8 /
0 .
t n
B
• The availability of pull-up resistors is indeterminate until internal power voltage stabilizes, if the RESET
• The input threshold voltage varies between programmable I/O ports and peripheral functions. There-
• Because ports P7
r o
s
t o
0
1. The INV03 bit is set to "0" after a low-level ("L") signal is applied to the NMI pin.
pin is held "L".
fore, if the lelvel of the voltage applied to a pin shared by both programmable I/O ports and peripheral
functions is not within the recommended operating condition, V
may vary depending on the programmable ports and peripheral functions.
3
affected by the three-phase motor control timer function and the NMI pin when these ports are set for
output functions (port output, timer output, three-phase PWM output, serial I/O output, intelligent I/O
output).
Table 27.4 shows the INVC0 register setting, the NMI pin input level and the state of output ports.
5
o r
n i
0
i t l
G
c
3
u
g
J
o
s
7
u
o r
h t
m
n i
n
0 -
. l
N I
S
r t
u
e r
r e
g
0
1
e
l o
V
p
, 1
0
t t
h t
e
0
u f
3
n i
u f
p -
(
2
e r
2
M
n
g
n
h
0
b
t c
e
3
t c
a
0
V
t i
p -
o i
s
2
5
o i
a
e
h
C
n
u l
) n
a
m
8 /
e
s
Page 486
t o
e
, 5
f o
2
r o
to P7
N I
M
3
V
1
0
o
o
2
C
u
u
(
(
C
5
0
p t
h t
p t
h t
f o
, P8
8 /
R
t u
e r
t u
e r
4
e
5
e
N I
e
d
e
9
g
) T
p -
0
p -
s i
n
4
t s i
V
, and P8
a
h
h
a
0
b
r e
-
a
a
b
3
e l
s
s
e l
e
b
e
) d
) d
_______
t i
P
P
(
) 1
W
W
1
M
M
have three-phase PWM output forced cutoff function, they are
H
L
t
r e
n I
o t
(
o f
m
p
N
c r
t u
n i
_______
M
a
-
-
b i
L
I
e t
y l
e
P
) d
v
n i
l e
P
H
P
H
O
O
S
g i
S
g i
u
u
S
L
L
p t
p t
P
h
h
a t
, 1
, 1
27. Precautions (Programmable I/O Ports)
i -
i -
IH
n i
t u
t u
e t
m
m
s
P
P
and V
u f
u f
_______
s
p
p
(
S
S
e
e
w
f o
n
n
, C
, C
d
d
t c
t c
h
a
a
e
P
o i
o i
P
n
P
n
n
7
IL
c
c
n
n
S
S
2
e
e
s
s
s
, 2
, 2
(neither "H" nor "L"), the level
e
o t
_______
s
s
s
s
t t
a t
a t
e
a
e
a
n i
P
e l
n
e l
n
e t
e t
7
g
d
d
c
c
5
a
e t
e t
P
P
,
n
P
S
S
d
d
8
o
L
L
b
b
0
u
2
2
y
y
,
p t
e r
e r
a
h t
h t
t u
n
g
g
e
e
d
s i
s i
i p
P
P
P
e t
e t
) n
S
S
8
s r
s r
, 1
, 1
1
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