M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 435
![IC M32C MCU FLASH 100LQFP](/photos/12/22/122251/m30853fjgp_u3_sml.jpg)
M30853FJGP#U3
Manufacturer Part Number
M30853FJGP#U3
Description
IC M32C MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(364 pages)
2.M30853FHFPD5.pdf
(94 pages)
3.M30853FHFPU3.pdf
(544 pages)
Specifications of M30853FJGP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30853FJGP#U3M30853FJGP#D5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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25.3.5.6 Erase All Unlocked Block Command
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The erase all unlocked block command erases all blocks except the block A.
By writing command code "xxA7
erase (erase and verify) operation will run continuously in all blocks except the block A.
The FMR00 bit in the FMR0 register indicates whether or not an auto erase operation has been
completed.
After the completion of an auto erase operation, the FMR07 bit in the FMR0 register indicates whether
or not the auto erase operation has been completed as expected.
The lock bit can protect each block from being programmed inadvertently. (Refer to 25.3.6 Data
Protect Function.)
In EW mode 1, do not execute this command when the lock bit for any block storing the rewrite control
program is set to "1" (unlocked) or when the FMR02 bit in the FMR0 register is set to "1" (lock bit
disabled).
In EW mode 0, the microcomputer enters read status register mode as soon as an auto erase opera-
tion starts. The SRD register can be read. The SR7 bit in the SRD register is set to "0" (busy) at the
same time an auto erase operation starts. It is set to "1" (ready) when an auto erase operation is
completed. The microcomputer remains in read status register mode until the read array command or
read lock bit status command is written.
Only blocks 0 to 12 can be erased by the erase all unlocked block command. The block A cannot be
erased. Use the block erase command to erase the block A.
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Page 410
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" in the first bus cycle and "xxD0
16
" in the second bus cycle, auto
25. Flash Memory Version
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