M30853FJGP#U3 Renesas Electronics America, M30853FJGP#U3 Datasheet - Page 223
![IC M32C MCU FLASH 100LQFP](/photos/12/22/122251/m30853fjgp_u3_sml.jpg)
M30853FJGP#U3
Manufacturer Part Number
M30853FJGP#U3
Description
IC M32C MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(364 pages)
2.M30853FHFPD5.pdf
(94 pages)
3.M30853FHFPU3.pdf
(544 pages)
Specifications of M30853FJGP#U3
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30853FJGP#U3M30853FJGP#D5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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M
R
R
e
E
3
. v
J
2
Figure 17.7 U0SMR3 to U4SMR3 Registers
0
C
1
9
0 .
8 /
B
0
3
5
0
3
G
J
7
u
o r
UARTi Special Mode Register 3
0 -
. l
b7
NOTES:
u
0
1
p
, 1
0
b6
1. Set the SS pin after the CRD bit in the UiC0 register is set to "1" (CTS/RTS function disabled).
2. The ERR bit is set to "0" by program. It is unchanged if set to "1".
3. Digital delay is generated from a SDAi output by the DL2 to DL0 bits in I
4. When the external clock is selected, approximately 100ns delay is added.
3
(
2
M
"000
b5
0
3
0
2
5
b4
2
C
" (no delay) except in the I
8 /
b3
Page 198
, 5
b2
M
b1
3
2
C
b0
f o
8 /
4
5
Symbol
NODC
CKPH
9
DINC
) T
ERR
SSE
DL0
DL1
DL2
4
Bit
Symbol
U0SMR3 to U4SMR3
2
C mode.
SS Pin Function
Enable Bit
Clock Phase
Set Bit
Serial Input Port
Set Bit
Clock Output
Select Bit
Fault Error Flag
SDAi Digital Delay
Time Set Bit
Bit Name
(1)
(i=0 to 4)
(3, 4)
(2)
Address
0365
16,
b7 b6 b5
0: Disables SS pin function
1: Enables SS pin function
0: No clock delay
1: Clock delay
0: Selects the TxDi and RxDi pins
(master mode)
1: Selects the STxDi and SRxDi pins
(slave mode)
0: CMOS output
1: N-channel open drain output
0: No error
1: Error
000 : No delay
001 : 1-to-2 cycles of BRG count source
010 : 2-to-3 cycles of BRG count source
011 : 3-to-4 cycles of BRG count source
100 : 4-to-5 cycles of BRG count source
101 : 5-to-6 cycles of BRG count source
110 : 6-to-7 cycles of BRG count source
111 : 7-to-8 cycles of BRG count source
02E5
16,
0335
16,
0325
2
C mode. Set these bits to
Function
16,
02F5
16
After Reset
00
16
RW
RW
RW
RW
RW
RW
RW
RW
RW
17. Serial I/O
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