M30622SAFP#U5 Renesas Electronics America, M30622SAFP#U5 Datasheet - Page 455

• Manufacturer Part Number: M30622SAFP#U5
• Description: IC M16C MPU ROMLESS 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30622SAFP#U5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

A-D Converter
2-136
Table 2.7.13. Variation of the successive comparison register and Vref while A-D conversion is in
Figure 2.7.25. Theoretical A-D conversion characteristics (8-bit mode)
A-D converter stopped
2nd comparison
3rd comparison
1st comparison
8th comparison
Result of A-D conversion
FE
03
02
01
00
FF
2048
Conversion
V
complete
REF
16
16
16
16
16
16
x 3
0
progress (8-bit mode)
V
256
REF
n
n
n
n
b9
Successive approximation register
1
1
9
9
9
9
This data transfers to bit 0 to
bit 7 of A-D register i.
n
n
n
x 1
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
1 0 0 0 0 0 0 0 0
8
8
8
1st comparison result
n
n
1 0 0 0 0 0 0 0
7
7
2nd comparison result
n
n
6
6
V
256
REF
n
n
5
5
n
n
x 2
4
4
n
n
3
3
n
1 0 0
2
V
256
REF
0 0
Theoretical A-D conversion
characteristic of general 8-bit
A-D converter
b0
x 3
V
V
V
V
V
2
REF
REF
REF
REF
REF
2
2
2
2
V
256
REF
[V]
–
±
±
±
x 4
V
V
2048
V
V
REF
REF
REF
REF
4
4
4
Theoretical A-D conversion
characteristic in the 8-bit mode
[V]
–
±
±
V
256
REF
2048
V
V
V
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
REF
REF
REF
8
8
x 254
V
ref
[V]
–
± ...... ±
Analog input voltage
change
V
2048
REF
V
256
n
n
REF
9
9
= 1
= 0
V
[V]
256
x 255
REF
M16C / 62A Group
+
–
n
Mitsubishi microcomputers
n
8
8
–
V
V
= 0
= 1
REF
REF
V
4
4
2048
REF
V
REF
+
–
[V]
V
V
REF
REF
8
8