M30622SAFP#U5 Renesas Electronics America, M30622SAFP#U5 Datasheet - Page 274

IC M16C MPU ROMLESS 100QFP

M30622SAFP#U5

Manufacturer Part Number
M30622SAFP#U5
Description
IC M16C MPU ROMLESS 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets

Specifications of M30622SAFP#U5

Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
50
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Appendix Standard Serial I/O Mode 1 (Flash Memory Version)
Table 1.29.3. Status register 1 (SRD1)
Status Register 1 (SRD1)
SRD1 bits
SR15 (bit7)
SR14 (bit6)
SR13 (bit5)
SR12 (bit4)
SR11 (bit3)
SR10 (bit2)
SR9 (bit1)
SR8 (bit0)
Status register 1 indicates the status of serial communications, results from ID checks and results from
check sum comparisons. It can be read after the SRD by writing the read status register command (70
Also, status register 1 is cleared by writing the clear status register command (50
Table 1.29.3 gives the definition of each status register 1 bit. “00
and the flag status is maintained even after the reset.
Boot Update Completed Bit (SR15)
Check Sum Match Bit (SR12)
ID Check Completed Bits (SR11 and SR10)
Data Receive Time Out (SR9)
This flag indicates whether the control program was downloaded to the RAM or not, using the down-
load function.
This flag indicates whether the check sum matches or not when a program, is downloaded for execu-
tion using the download function.
These flags indicate the result of ID checks. Some commands cannot be accepted without an ID
check.
This flag indicates when a time out error is generated during data reception. If this flag is attached
during data reception, the received data is discarded and the microcomputer returns to the command
wait state.
Boot update completed bit
ID check completed bits
Data receive time out
Check sum match bit
Status name
Reserved
Reserved
Reserved
Update co
Time out
Match
"1"
00
01
10
11
-
-
-
mpleted
16
Not verified
Verification mismatch
Reserved
Verified
Definition
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
” is output when power is turned ON
Normal operation
Not update
Mismatch
"0"
16
-
-
-
).
M16C / 62A Group
Mitsubishi microcomputers
1-253
16
).

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