M30622SAFP#U5 Renesas Electronics America, M30622SAFP#U5 Datasheet - Page 411

• Manufacturer Part Number: M30622SAFP#U5
• Description: IC M16C MPU ROMLESS 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30622SAFP#U5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

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UART
Operation
Note
2.5.4 Operation of Serial I/O (transmission used for SIM interface)
In transmitting data in UART mode (used for SIM interface), choose functions from those listed in Table
2.5.6. Operations of the circled items are described below. Figure 2.5.14 shows the operation timing, and
Figures 2.5.15 and 2.5.16 show the set-up procedures.
Table 2.5.6. Choosed functions
(1) Setting the transmit enable bit and receive enable bit to “1” and writing transmission data to
(2) Transmission data held in the UART2 transmit buffer register is transmitted to the UART2
(3) When the stop bit(s) is (are) transmitted, the transmit register empty flag goes to “1”, which
(4) If the transmission condition of the next data is ready when transmission is completed, a start
(5) If a parity error occurs, an L is output from the SIM card, and the RxD2 terminal turns to the
• Set the RxD2 terminal's direction register to input.
• The parity error level is determined within a UART2 transmission interrupt. When a transmis-
Transfer data
format
sion interrupt request occurs, set the priority level of the transmission interrupt higher than
those of other interrupts so that the interrupt routine can be immediately carried out. Either in
the main routine or in an interrupt routine, the interrupt inhibition time has to be made as short
as possible.
the UART2 transmit buffer register readies the data transmissible status. Set UART2 transfer
interrupt is enabled.
transmit register. At this time, the first bit (the start bit) of the transmission data is transmitted
from the TxD2 pin. Then, data is transmitted, bit by bit, in sequence: LSB, ····, MSB, parity bit,
and stop bit(s).
indicates that transmission is completed. At this time, the UART2 transmit interrupt request
bit goes to “1”. The transfer clock stops at “H” level.
bit is generated following to stop bit(s), and the next data is transmitted.
"L" level. Check the RxD2 terminal's level within the UART2 transmission interrupt routine,
and if it is found to be at the "L" level, then handle the error.
Item
O
Inverse format
Direct format
Set-up
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
M16C / 62A Group
Mitsubishi microcomputers