M30622SAFP#U5 Renesas Electronics America, M30622SAFP#U5 Datasheet - Page 429

• Manufacturer Part Number: M30622SAFP#U5
• Description: IC M16C MPU ROMLESS 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30622SAFP#U5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

2-110
A-D Converter
2.7 A-D Converter Usage
Note 1: The number of conversion cycles per one analog input pin.
Note 2: The conversion time per one analog input pin (when f
Table 2.7.1. Conversion time every operation clock
Frequency selection bit 1
Frequency selection bit 0
A-D converter's operation clock
Min. conversion
cycles (Note 1)
Min. conversion
time (Note 2)
2.7.1 Overview of the A-D converter usage
The A-D converter used in the M16C/62A group operates on a successive conversion basis. The follow-
ing is an overview of the A-D converter usage.
(1) Mode
(2) Operation clock
(3) Conversion time
The A-D converter operates in one of five modes:
(a) One-shot mode
(b) Repetition mode
(c) One-shot sweep mode
(d) Repeated sweep mode 0
(e) Repeated sweep mode 1
The operation clock in 5 V operation can be selected from the following: f
divide-by-4 f
equal to that of the CPU’s main clock.
Number of conversion for A-D convertor varies depending on resolution as given. Table 2.7.1 shows
relation between the A-D converter operation clock and conversion time.
Sample & Hold function selected:
No Sample & Hold function:
Carries out A-D conversion on input level of one specified pin only once.
Repeatedly carries out A-D conversion on input level of one specified pin.
Carries out A-D conversion on input level of two or more specified pins only once.
Repeatedly carries out A-D conversion on input level of two or more pins.
Repeatedly carries out A-D conversion on input level of two or more pins. This mode is different from
the repeated sweep mode 0 in that weights can be assigned to specifing pins control the number of
conversion times.
33 AD cycles for 10-bit resolution, or 28 AD cycles for 8-bit resolution
59 AD cycles for 10-bit resolution, or 49 AD cycles for 8-bit resolution
AD
. In 3 V operation, the selection is divide-by-2 f
8-bit mode
10-bit mode
8-bit mode
10-bit mode
AD
11.2µs
13.2µs
=
AD
0
= f(X
f
AD
4
IN
) = 10 MHz)
28 X
33 X
0
AD
AD
AD
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
or divide-by-4. The f
AD
=
5.6µs
6.6µs
1
f
AD
AD
2
, divide-by-2 f
M16C / 62A Group
Mitsubishi microcomputers
AD
frequency is
AD
Invalid
2.8µs
3.3µs
AD
= f
1
, and
AD