LPC2387FBD100,551 NXP Semiconductors, LPC2387FBD100,551 Datasheet - Page 21

• Manufacturer Part Number: LPC2387FBD100,551
• Description: IC ARM7 MCU FLASH 512K 100LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2300r

Specifications of LPC2387FBD100,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 6x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC23
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2C/I2S/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB2387, MCB2387U, MCB2387UME
• Development Tools By Supplier: OM11013
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Cpu Family: LPC2000
• Device Core: ARM7TDMI-S
• Device Core Size: 16/32Bit
• Frequency (max): 72MHz
• Total Internal Ram Size: 98KB
• # I/os (max): 70
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4359 - BOARD EVAL FOR LPC2387568-4310 - EVAL BOARD LPC2158 W/LCD568-3999 - BOARD EVAL FOR LPC23 ARM MCU622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 568-4322; 935284932551; LPC2387FBD100-S

NXP Semiconductors
LPC2387
Product data sheet
7.10.2.1 Features
7.10.3.1 Features
7.10.2 USB host controller
7.10.3 USB OTG controller
7.11 CAN controller and acceptance filters
The host controller enables full- and low-speed data exchange with USB devices attached
to the bus. It consists of register interface, serial interface engine, and DMA controller. The
register interface complies with the OHCI specification.
USB OTG (On-The-Go) is a supplement to the USB 2.0 specification that augments the
capability of existing mobile devices and USB peripherals by adding host functionality for
connection to USB peripherals.
The OTG Controller integrates the Host Controller, device controller, and a master-only
I
controls an external OTG transceiver.
The Controller Area Network (CAN) is a serial communications protocol which efficiently
supports distributed real-time control with a very high level of security. Its domain of
application ranges from high-speed networks to low cost multiplex wiring.
The CAN block is intended to support multiple CAN buses simultaneously, allowing the
device to be used as a gateway, switch, or router among a number of CAN buses in
industrial or automotive applications.
Each CAN controller has a register structure similar to the NXP SJA1000 and the PeliCAN
Library block, but the 8-bit registers of those devices have been combined in 32-bit words
to allow simultaneous access in the ARM environment. The main operational difference is
that the recognition of received Identifiers, known in CAN terminology as Acceptance
Filtering, has been removed from the CAN controllers and centralized in a global
Acceptance Filter.
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C interface to implement OTG dual-role device functionality. The dedicated I
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Supports DMA transfers with the DMA RAM of 8 kB on all non-control endpoints.
Allows dynamic switching between CPU-controlled and DMA modes.
Double buffer implementation for Bulk and Isochronous endpoints.
OHCI compliant.
Two downstream ports.
Supports per-port power switching.
Fully compliant with On-The-Go supplement to the USB 2.0 Specification, Revision
1.0a.
Hardware support for Host Negotiation Protocol (HNP).
Includes a programmable timer required for HNP and Session Request Protocol
(SRP).
Supports any OTG transceiver compliant with the OTG Transceiver Specification
(CEA-2011), Rev. 1.0.
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 10 February 2011
Single-chip 16-bit/32-bit MCU
LPC2387
© NXP B.V. 2011. All rights reserved.
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C interface
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