AT90USB646-MU Atmel, AT90USB646-MU Datasheet - Page 101
![IC AVR MCU 64K 64QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
AT90USB646-MU
Manufacturer Part Number
AT90USB646-MU
Description
IC AVR MCU 64K 64QFN
Manufacturer
Atmel
Series
AVR® 90USBr
Datasheet
1.AT90USB646-MU.pdf
(461 pages)
Specifications of AT90USB646-MU
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB, USB OTG
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Processor Series
90USB
Core
AVR
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
SPI, TWI, USART, USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
48
Number Of Timers
4
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Cpu Family
AT90
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
4KB
# I/os (max)
48
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
QFN EP
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATSTK525 - KIT STARTER FOR AT90USBAT90USBKEY2 - KIT DEMO FOR AT90USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AT90USB646-16MU
AT90USB646-16MU
AT90USB646-16MU
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90USB646-MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- Current page: 101 of 461
- Download datasheet (5Mb)
13.1.2
13.2
13.3
7593K–AVR–11/09
Timer/Counter Clock Sources
Counter Unit
Definitions
The double buffered Output Compare Registers (OCR0A and OCR0B) are compared with the
Timer/Counter value at all times. The result of the compare can be used by the Waveform Gen-
erator to generate a PWM or variable frequency output on the Output Compare pins (OC0A and
OC0B).
set the Compare Flag (OCF0A or OCF0B) which can be used to generate an Output Compare
interrupt request.
Many register and bit references in this section are written in general form. A lower case “n”
replaces the Timer/Counter number, in this case 0. A lower case “x” replaces the Output Com-
pare Unit, in this case Compare Unit A or Compare Unit B. However, when using the register or
bit defines in a program, the precise form must be used, i.e., TCNT0 for accessing
Timer/Counter0 counter value and so on.
The definitions in the table below are also used extensively throughout the document.
The Timer/Counter can be clocked by an internal or an external clock source. The clock source
is selected by the Clock Select logic which is controlled by the Clock Select (CS02:0) bits
located in the Timer/Counter Control Register (TCCR0B). For details on clock sources and pres-
caler, see
The main part of the 8-bit Timer/Counter is the programmable bi-directional counter unit.
13-2
Figure 13-2. Counter Unit Block Diagram
Signal description (internal signals):
BOTTOM
MAX
TOP
shows a block diagram of the counter and its surroundings.
count
direction
clear
See “Output Compare Unit” on page 102.
“Timer/Counter0, Timer/Counter1, and Timer/Counter3 Prescalers” on page
The counter reaches the BOTTOM when it becomes 0x00.
The counter reaches its MAXimum when it becomes 0xFF (decimal 255).
The counter reaches the TOP when it becomes equal to the highest
value in the count sequence. The TOP value can be assigned to be the
fixed value 0xFF (MAX) or the value stored in the OCR0A Register. The
assignment is dependent on the mode of operation.
DATA BUS
TCNTn
Increment or decrement TCNT0 by 1.
Select between increment and decrement.
Clear TCNT0 (set all bits to zero).
direction
count
clear
bottom
Control Logic
for details. The Compare Match event will also
top
TOVn
(Int.Req.)
clk
Tn
AT90USB64/128
Clock Select
( From Prescaler )
Detector
Edge
Tn
98.
Figure
101
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