ATMEGA169V-1MC Atmel, ATMEGA169V-1MC Datasheet - Page 266

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ATMEGA169V-1MC

Manufacturer Part Number
ATMEGA169V-1MC
Description
IC MCU AVR 16K 1.8V 1MHZ 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA169V-1MC

Core Processor
AVR
Core Size
8-Bit
Speed
1MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
64-MLF®, 64-QFN
For Use With
ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Memory
Programming
Program And Data
Memory Lock Bits
266
ATmega169V/L
The ATmega169 provides six Lock bits which can be left unprogrammed (“1”) or can be
programmed (“0”) to obtain the additional features listed in Table 117. The Lock bits can
only be erased to “1” with the Chip Erase command.
Table 116. Lock Bit Byte
Note:
Table 117. Lock Bit Protection Modes
BLB12
BLB11
BLB02
BLB01
LB2
LB1
BLB0 Mode
BLB1 Mode
LB Mode
Lock Bit Byte
1
2
3
1
2
3
4
Memory Lock Bits
1. “1” means unprogrammed, “0” means programmed
BLB02
BLB12
LB2
1
1
0
1
1
0
0
BLB01
BLB11
(1)
LB1
Bit No
1
0
0
1
0
0
1
7
6
5
4
3
2
1
0
Protection Type
No memory lock features enabled.
Further programming of the Flash and EEPROM is
disabled in Parallel and Serial Programming mode. The
Fuse bits are locked in both Serial and Parallel
Programming mode.
Further programming and verification of the Flash and
EEPROM is disabled in Parallel and Serial Programming
mode. The Boot Lock bits and Fuse bits are locked in both
Serial and Parallel Programming mode.
No restrictions for SPM or LPM accessing the Application
section.
SPM is not allowed to write to the Application section.
SPM is not allowed to write to the Application section, and
LPM executing from the Boot Loader section is not
allowed to read from the Application section. If Interrupt
Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
LPM executing from the Boot Loader section is not
allowed to read from the Application section. If Interrupt
Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
(1)(2)
Description
Boot Lock bit
Boot Lock bit
Boot Lock bit
Boot Lock bit
Lock bit
Lock bit
(1)
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
(1)
2514H–AVR–05/03

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