PIC24FJ128GA010-I/PT Microchip Technology, PIC24FJ128GA010-I/PT Datasheet - Page 122

• Manufacturer Part Number: PIC24FJ128GA010-I/PT
• Description: IC PIC MCU FLASH 128K 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ128GA010-I/PT

• Core Size: 16-Bit
• Program Memory Size: 128KB (43K x 24)
• Core Processor: PIC
• Speed: 16MHz
• Connectivity: I²C, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 84
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• Controller Family/series: PIC24
• No. Of I/o's: 84
• Ram Memory Size: 8KB
• Cpu Speed: 32MHz
• No. Of Timers: 5
• No. Of Pwm Channels: 5
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: SPI, I2C, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Package: 100TQFP
• Device Core: PIC
• Family Name: PIC24
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM240011 - KIT STARTER MPLAB FOR PIC24F MCUAC164333 - MODULE SKT FOR PM3 100QFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2MA160011 - DAUGHTER BOARD PICDEM LCD 16F91XDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC24FJ128GA FAMILY
FIGURE 14-2:
FIGURE 14-3:
DS39747A-page 120
Note
Note
PROCESSOR 1 (SPI Enhanced Buffer Master)
1:
2:
1:
2:
PROCESSOR 1 (SPI Master)
Using the SSx pin in Slave mode of operation is optional.
User must write transmit data to read received data from SPIxBUF. The SPIxTXB and SPIxRXB registers are memory
mapped to SPIxBUF.
MSTEN (SPIxCON1<5> = 1 and
(MSTEN (SPIxCON1<5> = 1))
Using the SSx pin in Slave mode of operation is optional.
User must write transmit data to read received data from SPIxBUF. The SPIxTXB and SPIxRXB registers are memory
mapped to SPIxBUF.
SPIBEN (SPIxCON2<0>) = 1
MSb
MSb
SPI™ MASTER/SLAVE CONNECTION (ENHANCED BUFFER MODES)
SPI™ MASTER/SLAVE CONNECTION (STANDARD MODE)
8-Level FIFO Buffer
Serial Receive Buffer
Serial Transmit Buffer
Shift Register
SPIx Buffer
(SPIxBUF)
Shift Register
(SPIxSR)
SPIx Buffer
(SPIxRXB)
(SPIxBUF)
(SPIxTXB)
(SPIxSR)
LSb
LSb
Advance Information
SDOx
SCKx
SDIx
SDOx
SDIx
SCKx
SSx
Serial Clock
Serial Clock
(SSEN (SPIxCON1<7>) = 1 and MSTEN (SPIxCON1<5>) = 0)
SDIx
SDOx
SCKx
SSx
SCKx
SDIx
SDOx
SSx
PROCESSOR 2 (SPI Enhanced Buffer Slave)
PROCESSOR 2 (SPI Slave)
MSb
Serial Transmit Buffer
Serial Receive Buffer
MSTEN (SPIxCON1<5>) = 0 and
SSEN (SPIxCON1<7>) = 1 and
SPIBEN (SPIxCON2<0>) = 1
Shift Register
SPIx Buffer
(SPIxRXB)
(SPIxTXB)
(SPIxBUF)
MSb
(SPIxSR)
8-level FIFO Buffer
Shift Register
SPIx Buffer
(SPIxBUF)
(SPIxSR)
© 2005 Microchip Technology Inc.
LSb
LSb