DSPIC30F3010-30I/SO Microchip Technology, DSPIC30F3010-30I/SO Datasheet - Page 35
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DSPIC30F3010-30I/SO
Manufacturer Part Number
DSPIC30F3010-30I/SO
Description
IC DSPIC MCU/DSP 24K 28SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F3010-30ISO.pdf
(228 pages)
2.DSPIC30F3010-30ISO.pdf
(18 pages)
3.DSPIC30F3010-30ISO.pdf
(6 pages)
4.DSPIC30F3010-30ISO.pdf
(16 pages)
5.DSPIC30F3010-30ISO.pdf
(22 pages)
6.DSPIC30F3014-30IP.pdf
(244 pages)
Specifications of DSPIC30F3010-30I/SO
Program Memory Type
FLASH
Program Memory Size
24KB (8K x 24)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
30 MHz
Data Ram Size
1 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300027, DM330011, DM300018, DM183021
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F301030ISO
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F3010-30I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
FIGURE 3-3:
3.1.2
The upper 32 Kbytes of data space may optionally be
mapped into any 16K word program space page. This
provides transparent access of stored constant data
from X data space, without the need to use special
instructions (i.e., TBLRDL/H, TBLWTL/H instructions).
Program space access through the data space occurs
if the MS bit of the data space EA is set and program
space visibility is enabled, by setting the PSV bit in the
Core Control register (CORCON). The functions of
CORCON are discussed in Section 2.5, DSP Engine.
Data accesses to this area add an additional cycle to
the instruction being executed, since two program
memory fetches are required.
Note that the upper half of addressable data space is
always part of the X data space. Therefore, when a
DSP operation uses program space mapping to access
this memory region, Y data space should typically con-
tain state (variable) data for DSP operations, whereas
X data space should typically contain coefficient
(constant) data.
Although each data space address, 0x8000 and
higher, maps directly into a corresponding program
memory address (see Figure 3-4), only the lower
16-bits of the 24-bit program word are used to contain
the data. The upper 8 bits should be programmed to
force an illegal instruction to maintain machine robust-
ness. Refer to the Programmer’s Reference Manual
(DS70030) for details on instruction encoding.
2004 Microchip Technology Inc.
PROGRAM SPACE VISIBILITY
FROM DATA SPACE
Program Memory
‘Phantom’ Byte
(Read as ‘0’)
PC Address
0x000004
0x000006
0x000002
0x000000
PROGRAM DATA TABLE ACCESS (MS BYTE)
00000000
00000000
00000000
00000000
TBLRDH.B (Wn<0> = 1)
Preliminary
23
Note that by incrementing the PC by 2 for each pro-
gram memory word, the LS 15 bits of data space
addresses directly map to the LS 15 bits in the corre-
sponding program space addresses. The remaining
bits are provided by the Program Space Visibility Page
register, PSVPAG<7:0>, as shown in Figure 3-4.
For instructions that use PSV which are executed
outside a REPEAT loop:
• The following instructions will require one instruc-
• All other instructions will require two instruction
For instructions that use PSV which are executed
inside a REPEAT loop:
• The following instances will require two instruction
• Any other iteration of the REPEAT loop will allow
16
Note:
tion cycle in addition to the specified execution
time:
- MAC class of instructions with data operand
- MOV instructions
- MOV.D instructions
cycles in addition to the specified execution time
of the instruction.
cycles in addition to the specified execution time
of the instruction:
- Execution in the first iteration
- Execution in the last iteration
- Execution prior to exiting the loop due to an
- Execution upon re-entering the loop after an
the instruction, accessing data using PSV, to
execute in a single cycle.
TBLRDH.W
pre-fetch
interrupt
interrupt is serviced
TBLRDH.B (Wn<0> = 0)
PSV access is temporarily disabled during
Table Reads/Writes.
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dsPIC30F
DS70082G-page 33
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