DSPIC30F3010-30I/SO Microchip Technology, DSPIC30F3010-30I/SO Datasheet - Page 237
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DSPIC30F3010-30I/SO
Manufacturer Part Number
DSPIC30F3010-30I/SO
Description
IC DSPIC MCU/DSP 24K 28SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F3010-30ISO.pdf
(228 pages)
2.DSPIC30F3010-30ISO.pdf
(18 pages)
3.DSPIC30F3010-30ISO.pdf
(6 pages)
4.DSPIC30F3010-30ISO.pdf
(16 pages)
5.DSPIC30F3010-30ISO.pdf
(22 pages)
6.DSPIC30F3014-30IP.pdf
(244 pages)
Specifications of DSPIC30F3010-30I/SO
Program Memory Type
FLASH
Program Memory Size
24KB (8K x 24)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
20
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
30 MHz
Data Ram Size
1 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300027, DM330011, DM300018, DM183021
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F301030ISO
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F3010-30I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Idle Current (I
In-Circuit Serial Programming (ICSP) ............................... 151
Independent PWM Output ................................................ 107
Initialization Condition for RCON Register Case 1 ........... 160
Initialization Condition for RCON Register Case 2 ........... 160
Initialization Condition for RCON Register, Case 1 .......... 160
Input Capture (CAPX) Timing Characteristics .................. 201
Input Capture Interrupts ...................................................... 89
Input Capture Module ......................................................... 87
Input Capture Timing Requirements ................................. 201
Input Change Notification Module ....................................... 71
Input Characteristics
Instruction Addressing Modes............................................. 43
Instruction Flow ................................................................... 22
Instruction Set ................................................................... 165
Instruction Set Overview ................................................... 168
Instruction Stalls.................................................................. 45
Inter-Integrated Circuit. See I
Internal Clock Timing Examples ....................................... 194
Interrupt Controller
Interrupt Priority
Interrupt Sequence ............................................................. 54
2004 Microchip Technology Inc.
General Call Address Support .................................. 119
Interrupts................................................................... 119
IPMI Support ............................................................. 119
Master Operation ...................................................... 119
Master Support ......................................................... 119
Operating Function Description ................................ 115
Operation During CPU Sleep and Idle Modes .......... 120
Pin Configuration ...................................................... 115
Programmer’s Model................................................. 115
Register Map............................................................. 121
Registers................................................................... 115
Slope Control ............................................................ 119
Software Controlled Clock Stretching (STREN = 1).. 118
Various Modes .......................................................... 115
Register Map............................................................... 90
In CPU Sleep Mode .................................................... 89
Simple Capture Event Mode ....................................... 88
Register Map (bits 15-8) ............................................. 71
Register Map (bits 7-0) ............................................... 71
QEA/QEB.................................................................. 204
File Register Instructions ............................................ 44
Fundamental Modes Supported.................................. 43
MAC Instructions......................................................... 44
MCU Instructions ........................................................ 44
Move and Accumulator Instructions............................ 44
Other Instructions........................................................ 44
Pipeline - 1-Word, 1-Cycle (Figure) ............................ 22
Pipeline - 1-Word, 2-Cycle (Figure) ............................ 22
Pipeline - 1-Word, 2-Cycle MOV.D Operations
Pipeline - 1-Word, 2-Cycle Table Operations
Pipeline - 1-Word, 2-Cycle with Instruction Stall
Pipeline - 2-Word, 2-Cycle DO, DOW (Figure) ........... 24
Pipeline - 2-Word, 2-Cycle GOTO, CALL (Figure)...... 23
Introduction ................................................................. 45
Raw Dependency Detection ....................................... 45
Register Map............................................................... 56
Traps........................................................................... 53
Interrupt Stack Frame ................................................. 55
(Figure) ............................................................... 23
(Figure) ............................................................... 23
(Figure) ............................................................... 24
IDLE
) ............................................................ 184
2
C
Preliminary
L
Load Conditions................................................................ 192
Low-Voltage Detect Characteristics.................................. 189
LVDL Characteristics ........................................................ 190
M
Memory Organization ......................................................... 13
Modulo Addressing ............................................................. 46
Motor Control PWM Module ............................................. 101
MPLAB ASM30 Assembler, Linker, Librarian ................... 174
MPLAB ICD 2 In-Circuit Debugger ................................... 175
MPLAB ICE 2000 High Performance Universal
MPLAB ICE 4000 High Performance Universal
MPLAB Integrated Development Environment Software.. 173
MPLINK Object Linker/MPLIB Object Librarian ................ 174
O
OC/PWM Module Timing Characteristics ......................... 202
Operating Current (I
Operating Frequency vs Voltage
Oscillator
Oscillator Configurations................................................... 154
Oscillator Selection ........................................................... 151
Oscillator Start-up Timer
Output Compare Interrupts ................................................. 93
Output Compare Mode
Output Compare Module .................................................... 91
Output Compare Operation During CPU Idle Mode ........... 93
Output Compare Sleep Mode Operation ............................ 93
P
Packaging Information ...................................................... 221
PICkit 1 Flash Starter Kit .................................................. 177
PICSTART Plus Development Programmer..................... 175
Pinout Descriptions............................................................. 15
PLL Clock Timing Specifications ...................................... 194
POR. See Power-on Reset
Port Write/Read Example ................................................... 68
Applicability................................................................. 48
Decrementing Buffer Operation Example................... 48
Incrementing Buffer Operation Example .................... 47
Restrictions................................................................. 48
Start and End Address ............................................... 46
W Address Register Selection.................................... 47
Fault Timing Characteristics ..................................... 203
Timing Characteristics .............................................. 203
Timing Requirements ............................................... 203
In-Circuit Emulator.................................................... 175
In-Circuit Emulator.................................................... 175
dsPIC30FXXXX-20 (Extended) ................................ 180
Configurations
Operating Modes (Table).......................................... 152
Fail-Safe Clock Monitor ............................................ 155
Initial Clock Source Selection ................................... 154
Low Power RC (LPRC)............................................. 155
LP Oscillator Control................................................. 154
Phase Locked Loop (PLL) ........................................ 154
Start-up Timer (OST)................................................ 154
Timing Characteristics .............................................. 196
Timing Requirements ............................................... 197
Register Map .............................................................. 94
Timing Characteristics .............................................. 201
Timing Requirements ............................................... 201
Marking..................................................................... 221
Fast RC (FRC).................................................. 154
DD
) .................................................... 181
dsPIC30F
DS70082G-page 235