PIC18LF6310-I/PT Microchip Technology, PIC18LF6310-I/PT Datasheet - Page 398

• Manufacturer Part Number: PIC18LF6310-I/PT
• Description: IC PIC MCU FLASH 4KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF6310-I/PT

• Core Size: 8-Bit
• Program Memory Size: 8KB (4K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 54
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• No. Of Pwm: RoHS Compliant
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F6310/6410/8310/8410
RESET ............................................................................. 317
Reset .................................................................................. 49
Resets .............................................................................. 271
RETFIE ............................................................................ 318
RETLW ............................................................................. 318
RETURN .......................................................................... 319
Return Address Stack ........................................................ 64
Return Stack Pointer (STKPTR) ........................................ 65
Revision History ............................................................... 385
RLCF ................................................................................ 319
RLNCF ............................................................................. 320
RRCF ............................................................................... 320
RRNCF ............................................................................. 321
DS39635B-page 396
CVRCON (Comparator Voltage
DEVID1 (Device ID 1) .............................................. 278
DEVID2 (Device ID 2) .............................................. 278
HLVDCON (HLVD Control) ...................................... 265
INTCON (Interrupt Control) ...................................... 103
INTCON2 (Interrupt Control 2) ................................. 104
INTCON3 (Interrupt Control 3) ................................. 105
IPR1 (Peripheral Interrupt Priority 1) ........................ 112
IPR2 (Peripheral Interrupt Priority 2) ........................ 113
IPR3 (Peripheral Interrupt Priority 3) ........................ 114
MEMCON (Memory Control) ...................................... 89
OSCCON (Oscillator Control) .................................... 36
OSCTUNE (Oscillator Tuning) ................................... 33
PIE1 (Peripheral Interrupt Enable 1) ........................ 109
PIE2 (Peripheral Interrupt Enable 2) ........................ 110
PIE3 (Peripheral Interrupt Enable 3) ........................ 111
PIR1 (Peripheral Interrupt Request (Flag) 1) ........... 106
PIR2 (Peripheral Interrupt Request (Flag) 2) ........... 107
PIR3 (Peripheral Interrupt Request (Flag) 3) ........... 108
PSPCON (Parallel Slave Port Control) .................... 141
RCON (Reset Control) ....................................... 50, 115
RCSTA1 (EUSART1 Receive
RCSTA2 (AUSART2 Receive
SSPCON1 (MSSP Control 1, I
SSPCON1 (MSSP Control 1, SPI Mode) ................. 171
SSPCON2 (MSSP Control 2, I
SSPSTAT (MSSP Status, I
SSPSTAT (MSSP Status, SPI Mode) ...................... 170
STATUS ..................................................................... 77
STKPTR (Stack Pointer) ............................................ 65
T0CON (Timer0 Control) .......................................... 143
T1CON (Timer1 Control) .......................................... 147
T2CON (Timer 2 Control) ......................................... 153
T3CON (Timer3 Control) .......................................... 155
TXSTA1 (EUSART1 Transmit Status
TXSTA2 (AUSART2 Transmit Status
WDTCON (Watchdog Timer Control) ....................... 280
MCLR Reset, Normal Operation ................................ 49
MCLR Reset, Power Managed Modes ...................... 49
Power-on Reset (POR) .............................................. 49
Programmable Brown-out Reset (BOR) .................... 49
RESET Instruction ..................................................... 49
Stack Full Reset ......................................................... 49
Stack Underflow Reset .............................................. 49
Watchdog Timer (WDT) Reset ................................... 49
Reference Control) ........................................... 261
Status and Control) .......................................... 211
Status and Control) .......................................... 233
and Control) ..................................................... 210
and Control) ..................................................... 232
2
C Mode) ....................... 179
2
2
C Mode) ................. 180
C Mode) ................. 181
Preliminary
Run Modes
S
SCK ................................................................................. 169
SDI ................................................................................... 169
SDO ................................................................................. 169
Serial Clock, SCK ............................................................ 169
Serial Data In (SDI) .......................................................... 169
Serial Data Out (SDO) ..................................................... 169
Serial Peripheral Interface. See SPI Mode.
SETF ................................................................................ 321
Slave Select (SS) ............................................................. 169
SLEEP ............................................................................. 322
Sleep Mode
Software Simulator (MPLAB SIM) ................................... 338
Special Event Trigger. See Compare (CCP Module).
Special Features of the CPU ........................................... 271
Special Function Registers ................................................ 72
SPI Mode (MSSP)
SS .................................................................................... 169
SSPOV ............................................................................ 199
SSPOV Status Flag ......................................................... 199
SSPSTAT Register
Stack Full/Underflow Resets .............................................. 66
Standard Instructions ....................................................... 287
SUBFSR .......................................................................... 333
SUBFWB ......................................................................... 322
SUBLW ............................................................................ 323
SUBULNK ........................................................................ 333
SUBWF ............................................................................ 323
SUBWFB ......................................................................... 324
SWAPF ............................................................................ 324
T
T0CON Register
Table Pointer Operations (table) ........................................ 86
Table Reads/Table Writes ................................................. 66
PRI_RUN ................................................................... 40
RC_RUN .................................................................... 42
SEC_RUN .................................................................. 40
OSC1 and OSC2 Pin States ...................................... 37
Map ............................................................................ 72
Associated Registers ............................................... 177
Bus Mode Compatibility ........................................... 177
Effects of a Reset .................................................... 177
Enabling SPI I/O ...................................................... 173
Master Mode ............................................................ 174
Master/Slave Connection ......................................... 173
Operation ................................................................. 172
Serial Clock .............................................................. 169
Serial Data In ........................................................... 169
Serial Data Out ........................................................ 169
Slave Mode .............................................................. 175
Slave Select ............................................................. 169
Slave Select Synchronization .................................. 175
Sleep Operation ....................................................... 177
SPI Clock ................................................................. 174
Typical Connection .................................................. 173
R/W Bit ............................................................ 182, 183
PSA Bit .................................................................... 145
T0CS Bit .................................................................. 144
T0PS2:T0PS0 Bits ................................................... 145
T0SE Bit .................................................................. 144
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