PIC18LF6310-I/PT Microchip Technology, PIC18LF6310-I/PT Datasheet - Page 391

• Manufacturer Part Number: PIC18LF6310-I/PT
• Description: IC PIC MCU FLASH 4KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF6310-I/PT

• Core Size: 8-Bit
• Program Memory Size: 8KB (4K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 54
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• No. Of Pwm: RoHS Compliant
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

INDEX
A
A/D ................................................................................... 245
Absolute Maximum Ratings ............................................. 341
AC (Timing) Characteristics ............................................. 357
Access Bank ...................................................................... 71
ACKSTAT ........................................................................ 199
ACKSTAT Status Flag ..................................................... 199
ADCON0 Register ............................................................ 245
ADCON1 Register ............................................................ 245
ADCON2 Register ............................................................ 245
ADDFSR .......................................................................... 330
ADDLW ............................................................................ 293
Addressable Universal Synchronous Asynchronous
ADDULNK ........................................................................ 330
ADDWF ............................................................................ 293
ADDWFC ......................................................................... 294
ADRESH Register ............................................................ 245
ADRESL Register .................................................... 245, 248
Analog-to-Digital Converter. See A/D.
ANDLW ............................................................................ 294
ANDWF ............................................................................ 295
Assembler
AUSART
© 2007 Microchip Technology Inc.
A/D Converter Interrupt, Configuring ....................... 249
Acquisition Requirements ........................................ 250
ADCON0 Register .................................................... 245
ADCON1 Register .................................................... 245
ADCON2 Register .................................................... 245
ADRESH Register ............................................ 245, 248
ADRESL Register .................................................... 245
Analog Port Pins ...................................................... 140
Analog Port Pins, Configuring .................................. 252
Associated Registers ............................................... 254
Automatic Acquisition Time ...................................... 251
Calculating the Minimum Required
Configuring the Module ............................................ 249
Conversion Clock (T
Conversion Status (GO/DONE Bit) .......................... 248
Conversions ............................................................. 253
Converter Characteristics ........................................ 376
Discharge ................................................................. 253
Operation in Power-Managed Modes ...................... 252
Special Event Trigger (CCP) .................................... 254
Use of the CCP2 Trigger .......................................... 254
Load Conditions for Device Timing
Parameter Symbology ............................................. 357
Temperature and Voltage Specifications ................. 358
Timing Conditions .................................................... 358
GO/DONE Bit ........................................................... 248
Receiver Transmitter (AUSART). See AUSART.
MPASM Assembler .................................................. 338
Asynchronous Mode ................................................ 236
Acquisition Time .............................................. 250
Specifications ................................................... 358
Associated Registers, Receive ........................ 239
Associated Registers, Transmit ....................... 237
Receiver ........................................................... 238
Setting up 9-Bit Mode with
Transmitter ....................................................... 236
Address Detect ........................................ 238
AD
) ........................................... 251
PIC18F6310/6410/8310/8410
Preliminary
Auto-Wake-up on Sync Break Character ......................... 222
B
Bank Select Register (BSR) .............................................. 69
Baud Rate Generator ...................................................... 195
BC .................................................................................... 295
BCF ................................................................................. 296
BF .................................................................................... 199
BF Status Flag ................................................................. 199
Block Diagrams
Baud Rate Generator (BRG) ................................... 234
Synchronous Master Mode ...................................... 240
Synchronous Slave Mode ........................................ 243
16-Bit Byte Select Mode ............................................ 93
16-Bit Byte Write Mode .............................................. 91
16-Bit Word Write Mode ............................................ 92
8-Bit Multiplexed Mode .............................................. 96
A/D ........................................................................... 248
Analog Input Model .................................................. 249
AUSART Receive .................................................... 238
AUSART Transmit ................................................... 236
Baud Rate Generator .............................................. 195
Capture Mode Operation ......................................... 161
Comparator
Comparator Analog Input Model .............................. 259
Comparator Output .................................................. 258
Comparator Voltage Reference ............................... 262
Comparator Voltage Reference Output
Compare Mode Operation ....................................... 163
Device Clock .............................................................. 34
EUSART Receive .................................................... 220
EUSART Transmit ................................................... 218
External Power-on Reset Circuit
Fail-Safe Clock Monitor ........................................... 282
Generic I/O Port Operation ...................................... 117
High/Low-Voltage Detect with External Input .......... 266
Interrupt Logic .......................................................... 102
MSSP (I
MSSP (I
MSSP (SPI Mode) ................................................... 169
On-Chip Reset Circuit ................................................ 49
PIC18F6310/6410 ..................................................... 10
PIC18F8310/8410 ..................................................... 11
PLL (HS Mode) .......................................................... 31
PORTD and PORTE (Parallel Slave Port) ............... 140
Associated Registers ....................................... 234
Baud Rate Error, Calculating ........................... 234
Baud Rates, Asynchronous Modes ................. 235
High Baud Rate Select (BRGH Bit) ................. 234
Operation in Power-Managed Modes .............. 234
Sampling ......................................................... 234
Associated Registers, Receive ........................ 242
Associated Registers, Transmit ....................... 241
Reception ........................................................ 242
Transmission ................................................... 240
Associated Registers, Receive ........................ 244
Associated Registers, Transmit ....................... 243
Reception ........................................................ 244
Transmission ................................................... 243
I/O Operating Modes ....................................... 256
Buffer Example ................................................ 263
(Slow V
2
2
C Master Mode) ........................................ 193
C Mode) .................................................... 178
DD
Power-up) ........................................ 51
DS39635B-page 389