PIC18F6310-I/PT Microchip Technology, PIC18F6310-I/PT Datasheet - Page 399

• Manufacturer Part Number: PIC18F6310-I/PT
• Description: IC PIC MCU FLASH 4KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6310-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI/I2C/EUSART/AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 4
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

SS .................................................................................... 169
SSPOV ............................................................................. 199
SSPOV Status Flag ......................................................... 199
SSPSTAT Register
Stack Full/Underflow Resets .............................................. 66
Standard Instructions ....................................................... 287
SUBFSR .......................................................................... 333
SUBFWB .......................................................................... 322
SUBLW ............................................................................ 323
SUBULNK ........................................................................ 333
SUBWF ............................................................................ 323
SUBWFB .......................................................................... 324
SWAPF ............................................................................ 324
T
Table Pointer Operations (table) ........................................ 86
Table Reads/Table Writes ................................................. 66
TBLRD ............................................................................. 325
TBLWT ............................................................................. 326
Time-out in Various Situations (table) ................................ 53
Timer0 .............................................................................. 143
Timer1 .............................................................................. 147
Timer2 .............................................................................. 153
 2004 Microchip Technology Inc.
Enabling SPI I/O ...................................................... 173
Master Mode ............................................................ 174
Master/Slave Connection ......................................... 173
Operation ................................................................. 172
Serial Clock .............................................................. 169
Serial Data In ........................................................... 169
Serial Data Out ........................................................ 169
Slave Mode .............................................................. 175
Slave Select ............................................................. 169
Slave Select Synchronization .................................. 175
Sleep Operation ....................................................... 177
SPI Clock ................................................................. 174
Typical Connection .................................................. 173
R/W Bit ............................................................. 182, 183
16-Bit Mode Timer Reads and Writes ...................... 144
Associated Registers ............................................... 145
Clock Source Edge Select (T0SE Bit) ...................... 144
Clock Source Select (T0CS Bit) ............................... 144
Operation ................................................................. 144
Overflow Interrupt .................................................... 145
Prescaler. See Prescaler, Timer0.
16-Bit Read/Write Mode ........................................... 149
Associated Registers ............................................... 151
Interrupt .................................................................... 150
Low-Power Option ................................................... 149
Operation ................................................................. 148
Oscillator .......................................................... 147, 149
Oscillator Layout Considerations ............................. 150
Overflow Interrupt .................................................... 147
Resetting, Using a Special Event
TMR1H Register ...................................................... 147
TMR1L Register ....................................................... 147
Use as a Real-Time Clock ....................................... 150
Using as a Clock Source .......................................... 149
Associated Registers ............................................... 154
Interrupt .................................................................... 154
Operation ................................................................. 153
Output ...................................................................... 154
PR2 Register ............................................................ 165
TMR2 to PR2 Match Interrupt .................................. 165
Trigger Output (CCP) ....................................... 150
PIC18F6310/6410/8310/8410
Preliminary
Timer3 ............................................................................. 155
Timing Diagrams
16-Bit Read/Write Mode .......................................... 157
Associated Registers ............................................... 157
Operation ................................................................. 156
Oscillator .......................................................... 155, 157
Overflow Interrupt ............................................ 155, 157
Special Event Trigger (CCP) ................................... 157
TMR3H Register ...................................................... 155
TMR3L Register ...................................................... 155
A/D Conversion ....................................................... 378
Acknowledge Sequence .......................................... 202
Asynchronous Reception ................................. 221, 239
Asynchronous Transmission ........................... 219, 237
Asynchronous Transmission
Automatic Baud Rate Calculation ............................ 217
Auto-Wake-up Bit (WUE) During
Auto-Wake-up Bit (WUE) During Sleep ................... 223
Baud Rate Generator with Clock Arbitration ............ 196
BRG Overflow Sequence ........................................ 217
BRG Reset Due to SDA Arbitration
Brown-out Reset (BOR) ........................................... 365
Bus Collision During a Repeated
Bus Collision During a Repeated
Bus Collision During a Start
Bus Collision During a Start
Bus Collision During a Stop
Bus Collision During a Stop
Bus Collision for Transmit and
Capture/Compare/PWM
CLKO and I/O .......................................................... 362
Clock Synchronization ............................................. 189
Clock/Instruction Cycle .............................................. 67
Example SPI Master Mode (CKE = 0) ..................... 368
Example SPI Master Mode (CKE = 1) ..................... 369
Example SPI Slave Mode (CKE = 0) ....................... 370
Example SPI Slave Mode (CKE = 1) ....................... 371
External Clock (All Modes Except PLL) ................... 360
External Memory Bus for SLEEP
External Memory Bus for SLEEP
External Memory Bus for TBLRD
External Memory Bus for TBLRD
External Memory Bus for TBLRD
External Memory Bus for TBLRD
Fail-Safe Clock Monitor ........................................... 283
High/Low-Voltage Detect (VDIRMAG = 1) ............... 268
High/Low-Voltage Detect Characteristics ................ 357
(Back to Back) ......................................... 219, 237
Normal Operation ............................................ 223
During Start Condition ..................................... 205
Start Condition (Case 1) .................................. 206
Start Condition (Case 2) .................................. 206
Condition (SCL = 0) ......................................... 205
Condition (SDA Only) ...................................... 204
Condition (Case 1) ........................................... 207
Condition (Case 2) ........................................... 207
Acknowledge ................................................... 203
(All CCP Modules) ........................................... 367
(16-Bit Microprocessor Mode) ........................... 95
(8-Bit Microprocessor Mode) ............................. 98
(16-Bit Extended Microcontroller Mode) ............ 94
(16-Bit Microprocessor Mode) ........................... 94
(8-Bit Extended Microcontroller Mode) .............. 97
(8-Bit Microprocessor Mode) ............................. 97
DS39635A-page 397