PIC18F24J10-I/SP Microchip Technology, PIC18F24J10-I/SP Datasheet - Page 336

• Manufacturer Part Number: PIC18F24J10-I/SP
• Description: IC PIC MCU FLASH 8KX16 28-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F24J10-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPIC/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• Package: 28SPDIP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPAC162067 - HEADER INTRFC MPLAB ICD2 40/28P
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F45J10 FAMILY
TABLE 24-24: A/D CONVERTER CHARACTERISTICS: PIC18F24J10/25J10/44J10/45J10 (INDUSTRIAL)
FIGURE 24-20:
DS39682E-page 334
Param
A01
A03
A04
A06
A07
A10
A20
A21
A22
A25
A30
A50
Note 1:
No.
Note 1:
A/D DATA
SAMPLE
2:
3:
A/D CLK
ADRES
Symbol
N
E
E
E
E
—
ΔV
V
V
V
Z
I
BSF ADCON0, GO
REF
ADIF
REFH
REFL
AIN
AIN
IL
DL
OFF
GN
R
GO
REF
2:
The A/D conversion result never decreases with an increase in the input voltage and has no missing codes.
V
V
Maximum allowed impedance is 8.8 kΩ. This requires higher acquisition time than described in the A/D
chapter.
Q4
REFH
REFL
If the A/D clock source is selected as RC, a time of T
This allows the SLEEP instruction to be executed.
This is a minimal RC delay (typically 100 ns), which also disconnects the holding capacitor from the analog input.
Resolution
Integral Linearity Error
Differential Linearity Error
Offset Error
Gain Error
Monotonicity
Reference Voltage Range
(V
Reference Voltage High
Reference Voltage Low
Analog Input Voltage
Recommended Impedance of
Analog Voltage Source
V
current is from RA2/AN2/V
132
current is from RA3/AN3/V
REF
REFH
A/D CONVERSION TIMING
Input Current
– V
Characteristic
REFL
(Note 2)
)
9
(2)
8
REF
REF
OLD_DATA
- pin or V
7
+ pin or V
V
SS
. . .
SAMPLING STOPPED
V
Min
V
1.8
REFL
CY
—
—
—
—
—
—
—
—
– 0.3V
3
SS
SS
DD
is added before the A/D clock starts.
, whichever is selected as the V
, whichever is selected as the V
. . .
131
130
Guaranteed
Typ
—
—
—
—
—
—
—
—
—
—
—
—
—
2
(1)
V
1
DD
V
V
Max
<±1
<±1
<±3
<±3
150
REFH
REFH
2.2
10
—
—
– 3.0V
5
0
© 2009 Microchip Technology Inc.
Units
LSb ΔV
LSb ΔV
LSb ΔV
LSb ΔV
kΩ
μA
μA
bit
—
V
V
V
V
V
REFL
REFH
ΔV
V
V
V
During V
During A/D conversion
cycle.
NEW_DATA
DONE
SS
DD
DD
source.
REF
REF
REF
REF
REF
source.
≤
< 3.0V
≥ 3.0V
Conditions
T
V
CY
≥ 3.0V
≥ 3.0V
≥ 3.0V
≥ 3.0V
≥ 3.0V
AIN
AIN
acquisition.
≤
V
REF