PIC18F24J10-I/SP Microchip Technology, PIC18F24J10-I/SP Datasheet - Page 238

IC PIC MCU FLASH 8KX16 28-DIP

PIC18F24J10-I/SP

Manufacturer Part Number
PIC18F24J10-I/SP
Description
IC PIC MCU FLASH 8KX16 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F24J10-I/SP

Program Memory Type
FLASH
Program Memory Size
16KB (8K x 16)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPIC/I2C/EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10-ch x 10-bit
Package
28SPDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPAC162067 - HEADER INTRFC MPLAB ICD2 40/28P
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC18F45J10 FAMILY
TABLE 21-1:
DS39682E-page 236
300000h CONFIG1L
300001h CONFIG1H
300002h CONFIG2L
300003h CONFIG2H
300004h CONFIG3L
300005h CONFIG3H
3FFFFEh DEVID1
3FFFFFh DEVID2
Legend:
Note 1:
File Name
2:
3:
4:
x = unknown, u = unchanged, - = unimplemented. Shaded cells are unimplemented, read as ‘0’.
Values reflect the unprogrammed state as received from the factory and following Power-on Resets. In all other Reset
states, the configuration bytes maintain their previously programmed states.
The value of these bits in program memory should always be ‘1’. This ensures that the location is executed as a NOP if it
is accidentally executed.
This bit should always be maintained as ‘0’.
See Register 21-7 and Register 21-8 for DEVID values. These registers are read-only and cannot be programmed by
the user.
CONFIGURATION BITS AND DEVICE IDs
DEBUG
DEV10
DEV2
IESO
Bit 7
(2)
(2)
(2)
FCMEN
XINST
DEV1
DEV9
Bit 6
(2)
(2)
(2)
STVREN
DEV0
DEV8
Bit 5
(2)
(2)
(2)
REV4
DEV7
Bit 4
(2)
(2)
(2)
WDTPS3 WDTPS2
REV3
DEV6
Bit 3
(3)
FOSC2
REV2
DEV5
Bit 2
CP0
WDTPS1
FOSC1
REV1
DEV4
Bit 1
© 2009 Microchip Technology Inc.
WDTPS0
CCP2MX
WDTEN
FOSC0
REV0
DEV3
Bit 0
Unprogrammed
111- ---1
1111 01--
11-- -111
1111 1111
---- ----
1111 ---1
xxxx xxxx
0001 110x
Default/
Value
(1)
(4)
(4)

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