PIC16F506-I/SL Microchip Technology, PIC16F506-I/SL Datasheet - Page 55

IC PIC MCU FLASH 1KX14 14SOIC

PIC16F506-I/SL

Manufacturer Part Number
PIC16F506-I/SL
Description
IC PIC MCU FLASH 1KX14 14SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F506-I/SL

Program Memory Type
FLASH
Program Memory Size
1.5KB (1K x 12)
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
11
Ram Size
67 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
67 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
3-ch x 8-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
9.1.6
The ADRES register contains the results of the last
conversion. These results are present during the sam-
pling period of the next analog conversion process.
After the sampling period is over, ADRES is cleared
(= 0). A ‘leading one’ is then right shifted into the
ADRES to serve as an internal conversion complete
bit. As each bit weight, starting with the MSB, is con-
verted, the leading one is shifted right and the con-
verted bit is stuffed into ADRES. After a total of 9 right
REGISTER 9-1:
© 2007 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3-2
bit 1
bit 0
Note 1:
R/W-1
ANS1
2:
3:
4:
When the ANS bits are set, the channels selected will automatically be forced into Analog mode, regard-
less of the pin function previously defined. The only exception to this is the comparator, where the analog
input to the comparator and the ADC will be active at the same time. It is the users responsibility to ensure
that the ADC loading on the comparator input does not affect their application.
The ANS<1:0> bits are active regardless of the condition of ADON.
CHS<1:0> bits default to 11 after any Reset.
If the ADON bit is clear, the GO/DONE bit cannot be set.
ANALOG CONVERSION RESULT
REGISTER
ANS<1:0>: ADC Analog Input Pin Select bits
00 = No pins configured for analog input
01 = AN2 configured as an analog input
10 = AN2 and AN0 configured as analog inputs
11 = AN2, AN1 and AN0 configured as analog inputs
ADCS<1:0>: ADC Conversion Clock Select bits
00 = F
01 = F
10 = F
11 = INTOSC/4
CHS<1:0>: ADC Channel Select bits
00 = Channel AN0
01 = Channel AN1
10 = Channel AN2
11 = 0.6V absolute voltage reference
GO/DONE: ADC Conversion Status bit
1 = ADC conversion in progress. Setting this bit starts an ADC conversion cycle. This bit is
0 = ADC conversion completed/not in progress. Manually clearing this bit while a conversion is in
ADON: ADC Enable bit
1 = ADC module is operating
0 = ADC module is shut-off and consumes no power
R/W-1
ANS0
automatically cleared by hardware when the ADC is done converting.
process terminates the current conversion.
ADCON0: A/D CONTROL REGISTER (PIC12F510)
OSC
OSC
OSC
/16
/8
/4
W = Writable bit
‘1’ = Bit is set
ADCS1
R/W-1
ADCS0
R/W-1
(4)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(1), (2)
R/W-1
CHS1
shifts of the ‘leading one’ have taken place, the conver-
sion is complete; the ‘leading one’ has been shifted out
and the GO/DONE bit is cleared.
If the GO/DONE bit is cleared in software during a con-
version, the conversion stops. The data in ADRES is
the partial conversion result. This data is valid for the bit
weights that have been converted. The position of the
‘leading one’ determines the number of bits that have
been converted. The bits that were not converted
before the GO/DONE was cleared are unrecoverable.
PIC12F510/16F506
R/W-1
CHS0
x = Bit is unknown
GO/DONE
R/W-0
DS41268D-page 53
R/W-0
ADON
bit 0

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