PIC16F506-I/SL Microchip Technology, PIC16F506-I/SL Datasheet

IC PIC MCU FLASH 1KX14 14SOIC

PIC16F506-I/SL

Manufacturer Part Number
PIC16F506-I/SL
Description
IC PIC MCU FLASH 1KX14 14SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F506-I/SL

Program Memory Type
FLASH
Program Memory Size
1.5KB (1K x 12)
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
11
Ram Size
67 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
67 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
3-ch x 8-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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0
PIC12F510/16F506
Data Sheet
8/14-Pin, 8-Bit Flash Microcontrollers
© 2007 Microchip Technology Inc.
DS41268D

Related parts for PIC16F506-I/SL

PIC16F506-I/SL Summary of contents

Page 1

... Flash Microcontrollers © 2007 Microchip Technology Inc. PIC12F510/16F506 Data Sheet DS41268D ...

Page 2

... PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 3

... Special Function Hardware Registers (PIC16F506) • Operating Speed – 8 MHz Crystal Oscillator (PIC12F510 – 500 ns instruction cycle (PIC12F510 – 20 MHz Crystal Oscillator (PIC16F506 – 200 ns instruction cycle (PIC16F506) Special Microcontroller Features: • MHz Selectable Precision Internal Oscillator: - Factory calibrated to ±1% • ...

Page 4

... PIC12F510/16F506 Program Memory Device Flash (words) PIC16F506 PIC12F510 Pin Diagrams PDIP, SOIC and TSSOP RB5/OSC1/CLKIN RB4/OSC2/CLKOUT RB3/MCLR/V RC5/T0CKI RC4/C2OUT PDIP, SOIC, MSOP GP5/OSC1/CLKIN GP4/OSC2 GP3/MCLR/V DFN GP5/OSC1/CLKIN GP4/OSC2 GP3/MCLR/V DS41268D-page 2 Data Memory SRAM (bytes) 1024 67 1024 RB0/AN0/C1IN+/ICSPDAT 2 13 RB1/AN1/C1IN-/ICSPCLK ...

Page 5

... I/O Port ....................................................................................................................................................................................... 27 6.0 TMR0 Module and TMR0 Register............................................................................................................................................. 39 7.0 Comparator(s) ............................................................................................................................................................................ 43 8.0 Comparator Voltage Reference Module (PIC16F506 only)........................................................................................................ 49 9.0 Analog-to-Digital (A/D) Converter............................................................................................................................................... 51 10.0 Special Features Of The CPU.................................................................................................................................................... 55 11.0 Instruction Set Summary ............................................................................................................................................................ 71 12.0 Development Support................................................................................................................................................................. 79 13.0 Electrical Characteristics ............................................................................................................................................................ 83 14.0 DC and AC Characteristics Graphs and Charts ......................................................................................................................... 97 15 ...

Page 6

... PIC12F510/16F506 NOTES: DS41268D-page 4 © 2007 Microchip Technology Inc. ...

Page 7

... The Power-on Reset (POR) and Device Reset Timer (DRT) eliminate the need for external Reset circuitry. There are four oscillator con- figurations to choose from (six on the PIC16F506), including INTOSC Internal Oscillator mode and the Power-Saving LP (Low-power) Oscillator mode. Power-Saving Sleep mode, Watchdog Timer and code protection features improve system cost, power and reliability ...

Page 8

... PIC12F510/16F506 NOTES: DS41268D.-page 6 © 2007 Microchip Technology Inc. ...

Page 9

... Flash devices, but with all Flash locations and fuse options already programmed by the factory. Certain code and prototype verification procedures do apply before production shipments are available. Please contact your local Microchip Technology sales office for more details. © 2007 Microchip Technology Inc. PIC12F510/16F506 2 ...

Page 10

... PIC12F510/16F506 NOTES: DS41268D-page 8 © 2007 Microchip Technology Inc. ...

Page 11

... See the SUBWF and ADDWF instructions for examples. A simplified block diagram is shown in Figure 3-1 for PIC12F510 with the corresponding device pins described in Table 3-2. A simplified block diagram for PIC16F506 is corresponding device pins described in Table 3-3. Data ...

Page 12

... Addr FSR Reg STATUS Reg 3 MUX Device Reset Timer Power-on ALU Reset 8 Watchdog Timer W Reg Internal RC Clock Timer0 T0CKI GPIO GP0/ICSPDAT GP1/ICSPCLK GP2 GP3 GP4 GP5 C1IN+ Comparator C1IN- C1OUT CV REF AN0 8-bit ADC AN1 AN2 © 2007 Microchip Technology Inc. ...

Page 13

... Legend input output, I/O = input/output power, — = Not Used, TTL = TTL input Schmitt Trigger input Analog Voltage High Voltage © 2007 Microchip Technology Inc. PIC12F510/16F506 Output Input Type Type TTL CMOS Bidirectional I/O port. Can be software pro- grammed for internal weak pull-up and wake-up from Sleep on pin change ...

Page 14

... PIC12F510/16F506 FIGURE 3-2: PIC16F506 SERIES BLOCK DIAGRAM 10 Flash Program Memory Program 10 Bus Instruction Reg 8 Instruction Decode & Control Timing OSC1/CLKIN Generation OSC2/CLKOUT MCLR DS41268D-page 12 8 Data Bus Program Counter RAM STACK 1 67 bytes STACK 2 File Registers RAM Addr 9 Addr MUX Indirect ...

Page 15

... TABLE 3-3: PIN DESCRIPTIONS – PIC16F506 Name Function RB0/AN0/C1IN+/ICSPDAT RB0 AN0 C1IN+ ICSPDAT RB1/AN1/C1IN-/ICSPCLK RB1 AN1 C1IN- ICSPCLK RB2/AN2/C1OUT RB2 AN2 C1OUT RB3/MCLR/V RB3 PP MCLR V PP RB4/OSC2/CLKOUT RB4 OSC2 CLKOUT RB5/OSC1/CLKIN RB5 OSC1 CLKIN RC0/C2IN+ RC0 C2IN+ RC1/C2IN- RC1 ...

Page 16

... Q2, Q3 and Q4 cycles. Data memory is read during Q2 (operand read) and written during Q4 (destination write Fetch INST ( Execute INST (PC) Execute 1 Fetch 2 Execute 2 Fetch 3 Execute 3 Fetch Internal Phase Clock Fetch INST ( Execute INST ( Flush Fetch SUB_1 Execute SUB_1 © 2007 Microchip Technology Inc. ...

Page 17

... Program memory pages are accessed using STATUS register bit PA0. For the PIC12F510 and PIC16F506, with data memory register files of more than 32 registers, a banking scheme is used. Data memory banks are accessed using the File Select Register (FSR) ...

Page 18

... For the PIC12F510, the register file is composed of 10 Special Function Registers, 6 General Purpose Registers and 32 General Purpose Registers accessed by banking (see Figure 4-2). For the PIC16F506, the register file is composed of 13 Special Function Registers, 3 General Purpose Registers and 64 General Purpose accessed by banking (see Figure 4-3). ...

Page 19

... Shaded cells = unimplemented or unused. Note 1: The upper byte of the Program Counter is not directly accessible. See Section 4.6 “Program Counter” for an explanation of how to access these bits. © 2007 Microchip Technology Inc. PIC12F510/16F506 Bit 5 Bit 4 Bit 3 ...

Page 20

... PIC12F510/16F506 TABLE 4-2: SPECIAL FUNCTION REGISTER SUMMARY – PIC16F506 Address Name Bit 7 Bit 6 N/A TRIS I/O Control Registers (TRISB, TRISC) N/A OPTION Contains control bits to configure Timer0 and Timer0/WDT Prescaler 00h INDF Uses contents of FSR to address data memory (not a physical register) ...

Page 21

... A borrow from the 4th low-order bit of the result did not occur borrow from the 4th low-order bit of the result occurred bit 0 C: Carry/Borrow bit (for ADDWF, SUBWF and RRF, RLF instructions) ADDWF carry occurred carry did not occur © 2007 Microchip Technology Inc. PIC12F510/16F506 R-1 R-1 R/W Unimplemented bit, read as ‘ ...

Page 22

... PIC12F510/16F506 REGISTER 4-2: STATUS: STATUS REGISTER (PIC16F506) R/W-0 R/W-0 R/W-0 RBWUF CWUF PA0 bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7 RBWUF: PORTB Reset bit 1 = Reset due to wake-up from Sleep on pin change 0 = After power-up or other Reset ...

Page 23

... PS<2:0>: Prescaler Rate Select bits Bit Value Timer0 Rate 000 001 010 011 100 101 110 111 © 2007 Microchip Technology Inc. PIC12F510/16F506 functions are W-1 W-1 T0SE PSA U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared WDT Rate ...

Page 24

... PIC12F510/16F506 REGISTER 4-4: OPTION_REG: OPTION REGISTER (PIC16F506) W-1 W-1 W-1 RBWU RBPU T0CS bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7 RBWU: Enable Wake-up On Pin Change bit (RB0, RB1, RB3, RB4 Disabled 0 = Enabled bit 6 RBPU: Enable Weak Pull-Ups bit (RB0, RB1, RB3, RB4) ...

Page 25

... Center frequency 1111111 • • • 1000000 = Minimum frequency bit 0 Unimplemented: Read as ‘0’ © 2007 Microchip Technology Inc. PIC12F510/16F506 R/W-1 R/W-1 R/W-1 CAL3 CAL2 CAL1 U = Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-1 U-0 CAL0 — ...

Page 26

... There are no Status bits to indicate stack overflows or stack underflow conditions. 3: There are no instruction mnemonics called PUSH or POP. These are actions that occur from the execution of the CALL and RETLW instructions. 0 GOTO instruction will © 2007 Microchip Technology Inc. ...

Page 27

... The FSR<4:0> bits are used to select data memory addresses 00h to 1Fh. PIC16F506 – Uses FSR<6:5>. Selects from Bank 0 to Bank 3. FSR<7> is unimplemented, read as ‘1’. PIC12F510 – Uses FSR<5>. Selects from Bank 0 to Bank 1. FSR<7:6> are unimplemented, read as ‘11’. ...

Page 28

... PIC12F510/16F506 FIGURE 4-6: DIRECT/INDIRECT ADDRESSING (PIC16F506) Direct Addressing (FSR) (opcode Bank Select Location Select 00h Data 0Fh (1) Memory 10h Note 1: For register map detail, see Figure 4-3. DS41268D-page Addresses map back to addresses in Bank 0. 1Fh 3Fh 5Fh 7Fh Bank 0 Bank 1 Bank 2 Bank 3 ...

Page 29

... I/O’s to alternate functions. When acting as alternate functions, the pins will read as ‘0’ during a port read. Pins RB0/GP0, RB1/GP1, RB3/GP3 and RB4 (PIC16F506 only) can be configured with weak pull-up and also for wake-up on change. The wake-up on change and weak pull-up functions are not pin select- able ...

Page 30

... SS DS41268D-page 28 FIGURE 5-3: GPPU RBPU MCLRE (1) I/O Pin Reset Data Bus RD Port Q CK Mismatch and DD Note 1: GP3/MCLR pin has a protection diode to V only. BLOCK DIAGRAM OF GP3/RB3 (With Weak Pull-up And Wake-up On Change) (1) I/O Pin D SS © 2007 Microchip Technology Inc. ...

Page 31

... D Q TRIS Latch TRIS ‘f’ Reset T0CS C1T0CS ADC Pin Enable RD Port T0CKI ADC Note 1: I/O pins have protection diodes © 2007 Microchip Technology Inc. PIC12F510/16F506 FIGURE 5-5: C1OUT (1) I/O Pin Data Bus D Data WR Latch Port CK C1OUTEN W Reg D TRIS Latch TRIS ‘ ...

Page 32

... Bus D WR Port CK W I/O Reg (1) pin D TRIS ‘f’ CK (Note 2) Note 1: I/O pins have protection diodes to V and BLOCK DIAGRAM OF GP4 Q Data I/O Latch (1) pin Q Q TRIS Latch Q Reset INTOSC/RC RD Port Oscillator OSC1 Circuit and DD . © 2007 Microchip Technology Inc. ...

Page 33

... Latch TRIS ‘f’ Reset RD Port Oscillator OSC2 Circuit Note 1: I/O pins have protection diodes Input mode is disabled when pin is used for oscillator. © 2007 Microchip Technology Inc. PIC12F510/16F506 FIGURE 5-9: Data Bus D I/O (1) pin WR Port CK W Reg D TRIS ‘f’ CK ...

Page 34

... I/O pins have protection diodes DS41268D-page 32 FIGURE 5-11: Data Bus D Data WR Latch 1 (1) I/O PIN Port Reg D TRIS Latch TRIS ‘f’ CK Reset and Note 1: I/O pins have protection diodes BLOCK DIAGRAM OF RC3 (1) I/O Pin Port and DD © 2007 Microchip Technology Inc. ...

Page 35

... Port Q CK C2OUTEN W Reg D Q TRIS Latch TRIS ‘f’ Reset RD Port Note 1: I/O pins have protection diodes © 2007 Microchip Technology Inc. PIC12F510/16F506 FIGURE 5-13: (1) I/O Pin Data Bus D Data WR Latch Port CK W Reg D TRIS Latch TRIS ‘f’ CK Reset ...

Page 36

... I/O PIN FUNCTION ORDER OF PRECEDENCE (PIC16F506) Priority RB0 RB1 1 AN0/C1IN+ AN1/C1IN- 2 TRISB TRISB 3 — — TABLE 5-3: I/O PIN FUNCTION ORDER OF PRECEDENCE (PIC16F506) Priority RC0 RC1 1 C2IN+ C2IN- 2 TRISC TRISC TABLE 5-4: I/O PIN FUNCTION ORDER OF PRECEDENCE (PIC12F510) Priority GP0 GP1 ...

Page 37

... Note 1: Multiple column entries for a pin demonstrate the different permutations to arrive at digital functionality for the pin. 2: Shaded cells indicate the bit status does not affect the pins digital functionality. © 2007 Microchip Technology Inc. PIC12F510/16F506 GP1 GP1 GP2 GP2 0 ...

Page 38

... Multiple column entries for a pin demonstrate the different permutations to arrive at digital functionality for the pin. 2: Shaded cells indicate the bit status does not affect the pins digital functionality. TABLE 5-7: REQUIREMENTS FOR DIGITAL PIN OPERATION (PIC16F506 PORTC) RC0 RC0 CM2CON0 C2ON ...

Page 39

... NOP Data setup time = (0.25 T where: T Therefore, at higher clock frequencies, a Port pin write followed by a read may be problematic. sampled here MOVF PORTB,W NOP (Read PORTB) READ-MODIFY-WRITE INSTRUCTIONS ON AN I/O PORT (e.g., PIC16F506) PORTB latch PORTB pins ---------- ---------- --11 pppp --11 pppp ;--10 -ppp --11 pppp – ...

Page 40

... PIC12F510/16F506 NOTES: DS41268D-page 38 © 2007 Microchip Technology Inc. ...

Page 41

... The prescaler is shared with the Watchdog Timer (Figure 6-5). 3: Bit C1T0CS is located in the CM1CON0 register, CM1CON0<4>. © 2007 Microchip Technology Inc. PIC12F510/16F506 The second Counter mode uses the output of the com- parator to increment Timer0. It can be entered in two different ways. The first way is selected by setting the T0CS bit (OPTION< ...

Page 42

... N/A TRISGPIO — — Legend: Shaded cells not used by Timer0, – = unimplemented unknown unchanged. Note 1: The TRIS of the T0CKI pin is overridden when T0CS = 1. 2: For PIC12F510. 3: For PIC16F506. DS41268D-page NT0 Read TMR0 Read TMR0 Write TMR0 executed reads NT0 reads NT0 ...

Page 43

... Timer0 module means that there is no prescaler for the WDT and vice-versa. The PSA and PS<2:0> bits (OPTION<3:0>) determine prescaler assignment and prescale ratio. © 2007 Microchip Technology Inc. PIC12F510/16F506 When a prescaler is used, the external clock input is divided by the asynchronous ripple counter-type prescaler, so that the prescaler output is symmetrical ...

Page 44

... Timer WDT Enable bit Note 1: T0CS, T0SE, PSA, PS<2:0> are bits in the OPTION register. 2: T0CKI is shared with pin GP2 on the PIC12F510 and shared with RC5 on the PIC16F506. 3: Bit C1T0CS is located in the CM1CON0 register. DS41268D-page 42 To change prescaler from the WDT to the Timer0 module, use the sequence shown in Example 6-2 ...

Page 45

... COMPARATOR(S) The PIC12F510 contains one analog comparator module. The PIC16F506 contains two comparators and a comparator voltage reference. REGISTER 7-1: CM1CON0: COMPARATOR C1 CONTROL REGISTER (PIC12F510) R-1 R/W-1 R/W-1 C1OUT C1OUTEN C1POL bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set ...

Page 46

... PIC12F510/16F506 REGISTER 7-2: CM1CON0: COMPARATOR C1 CONTROL REGISTER (PIC16F506) R-1 R/W-1 R/W-1 C1OUT C1OUTEN C1POL bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7 C1OUT: Comparator Output bit > < bit 6 C1OUTEN: Comparator Output Enable bit 1 = Output of comparator is NOT placed on the C1OUT pin ...

Page 47

... REGISTER 7-3: CM2CON0: COMPARATOR C2 CONTROL REGISTER (PIC16F506) R-1 R/W-1 R/W-1 C2OUT C2OUTEN C2POL bit 7 Legend Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 7 C2OUT: Comparator Output bit > < bit 6 C2OUTEN: Comparator Output Enable bit 1 = Output of comparator is NOT placed on the C2OUT pin ...

Page 48

... COMPARATOR 1 BLOCK DIAGRAM FOR PIC12F510/16F506 C1PREF C1IN- 0 C1IN+ 1 C1NREF C1IN- 1 0.6V 0 (Internal Reference) Note 1: When C1ON = 0, the comparator, C1, will produce a ‘0’ output to the XOR Gate. FIGURE 7-2: COMPARATOR 2 BLOCK DIAGRAM (PIC16F506 ONLY) C2PREF1 C2PREF2 C2IN C1IN C2IN- C2NREF C2IN REF ...

Page 49

... V IN the digital output of the comparator is adjusted accord- ingly (Figure 7-3). Please see Section 8.0 “Compara- tor Voltage Reference Module (PIC16F506 only)” for internal reference specifications. 7.3 Comparator Response Time Response time is the minimum time after selecting a new reference voltage or input source before the com- parator output is to have a valid level ...

Page 50

... TRISB — — (2) N/A TRISC — — (1) N/A TRISGPIO — — Legend Unknown Unchanged, – = Unimplemented, read as ‘0’ Depends on condition. Note 1: PIC12F510 only. 2: PIC16F506 only. DS41268D-page 0. LEAKAGE V = 0.6V ±500 Input Capacitance = Threshold Voltage = Leakage Current at the Pin = Interconnect Resistance = Source Impedance ...

Page 51

... Note 1: When this bit is set, the TRIS for the CV CV pin. REF 2: CV controls for ratio metric reference applies to Comparator 2 on the PIC16F506 only. REF © 2007 Microchip Technology Inc. PIC12F510/16F506 8.2 Voltage Reference Accuracy/Error The full range of V construction of the module. The transistors on the top ...

Page 52

... Bit 6 0Ch VRCON VREN VROE (1) 08h CM1CON0 C1OUT C1OUTEN (1) 0Bh CM2CON0 C2OUT C2OUTEN Legend unknown unchanged, – = unimplemented, read as ‘0’. Note 1: PIC16F506 only. DS41268D-page 50 16 Stages MUX V REN VR<3:0> = 0000 VRR Bit 5 Bit 4 Bit 3 Bit 2 VRR — VR3 VR2 C1POL ...

Page 53

... Microchip Technology Inc. PIC12F510/16F506 When the CHS<1:0> bits are changed during an ADC conversion, the new channel will not be selected until the current conversion is completed. This allows the current conversion to complete with valid results. All channel selection information will be lost when the device enters Sleep ...

Page 54

... Table 9-2 than from use of the INTOSC/4 option for the OSC ADCS1 ADCS0 CHS1 350 200 100 32 kHz kHz kHz kHz — — — — 11 μs 20 μs 40 μs 125 μs 23 μs 40 μs 80 μs 250 μs 46 μs 80 μs 160 μs 500 μs CHS0 GO/DONE ADON © 2007 Microchip Technology Inc. ...

Page 55

... CHS<1:0> bits default to 11 after any Reset the ADON bit is clear, the GO/DONE bit cannot be set. © 2007 Microchip Technology Inc. PIC12F510/16F506 shifts of the ‘leading one’ have taken place, the conver- sion is complete; the ‘leading one’ has been shifted out and the GO/DONE bit is cleared ...

Page 56

... Bit is unknown CHANNEL SELECTION CHANGE DURING CONVERSION ;configure A/D ;start conversion ;setup for read of ;channel 1 ;read result ;save result ;start conversion ;setup for read of ;channel 2 ;read result ;save result ;start conversion ;read result ;save result ;optional: returns © 2007 Microchip Technology Inc. ...

Page 57

... The PIC12F510/16F506 devices have a Watchdog Timer, which can be shut off only through Configuration bit WDTE. It runs off of its own RC oscillator for added reliability. If using HS (PIC16F506 selectable oscillator options, there is always a delay, provided by the Device Reset Timer (DRT), intended to keep the chip in Reset until the crystal oscillator is stable. If using INTOSC, EXTRC or EC there ...

Page 58

... It is the responsibility of the application designer to ensure the use of the 1.125 ms (nominal) DRT will result in acceptable operation. Refer to Electrical Specifications for V ments for this mode of operation. DS41268D-page 56 — — — MCLRE CP WDTE DD (2) (2) rise time and stability require- DD (1) — — bit 8 FOSC1 FOSC0 bit 0 © 2007 Microchip Technology Inc. ...

Page 59

... EXTRC with RB4 function on RB4/OSC2/CLKOUT and 1.125 ms DRT 111 = EXTRC with CLKOUT function on RB4/OSC2/CLKOUT and 1.125 ms DRT Note 1: Refer to the “PIC16F506 Memory Programming Specification” (DS41258) to determine how to access the Configuration Word the responsibility of the application designer to ensure the use of the 1.125 ms (nominal) DRT will result in acceptable operation ...

Page 60

... Use of a series cut crystal may give a fre- quency out of the crystal manufacturers specifications. When in HS (PIC16F506 modes, the device can have an external clock source drive the (GP5/ RB5)/OSC1/CLKIN pin (Figure 10-2). When the part is used in this fashion, the output drive levels on the OSC2 pin are very weak ...

Page 61

... Since each crystal has its own characteristics, the user should con- sult the crystal manufacturer for appropri- ate values of external components. 3: PIC16F506 only. 10.2.3 EXTERNAL CRYSTAL OSCILLATOR CIRCUIT Either a prepackaged oscillator or a simple oscillator circuit with TTL gates can be used as an external crystal oscillator circuit ...

Page 62

... For the PIC12F510/16F506 devices, only bits <7:1> of OSCCAL are used for calibration. See Register 4-5 for more information. Note: The 0 bit of OSCCAL is unimplemented and should be written as ‘0’ when modify- Internal clock ing OSCCAL for compatibility with future devices. PIC12F510 PIC16F506 © 2007 Microchip Technology Inc. ...

Page 63

... Legend unchanged unknown, – = unimplemented bit, read as ‘0’ value depends on condition. Note 1: Bits <7:2> register contain oscillator calibration values due to MOVLW XX instruction at top of memory. 2: See Table 10-5 for Reset value for specific conditions. © 2007 Microchip Technology Inc. PIC12F510/16F506 MCLR Reset, WDT Time-out, Power-on Reset Wake-up On Pin Change, Wake-up on Comparator Change ...

Page 64

... PIC12F510/16F506 TABLE 10-4: RESET CONDITIONS FOR REGISTERS – PIC16F506 Register Address W — INDF 00h TMR0 01h PCL 02h STATUS 03h FSR 04h OSCCAL 05h PORTB 06h PORTC 07h CM1CON0 08h ADCON0 09h ADRES 0Ah CM2CON0 0Bh VRCON 0Ch OPTION — TRISB — ...

Page 65

... If these conditions are not met, the devices must be held in Reset until the operating parameters are met. © 2007 Microchip Technology Inc. PIC12F510/16F506 A simplified block diagram of the on-chip Power-on Reset circuit is shown in Figure 10-7. The Power-on Reset circuit and the Device Reset Timer (see Section 10.5 “ ...

Page 66

... Internal Reset FIGURE 10-9: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO V TIME V DD MCLR Internal POR DRT Time-out Internal Reset DS41268D-page 64 POR (Power-on Reset) MCLR Reset Start-up Timer (10 ms, 1.125 ms) TDRT CHIP Reset TDRT ): FAST V RISE DD DD © 2007 Microchip Technology Inc. ...

Page 67

... V DD MCLR Internal POR DRT Time-out Internal Reset Note: When V rises slowly, the T DD value. In this example, the chip will reset properly if, and only if, V1 ≥ V © 2007 Microchip Technology Inc. PIC12F510/16F506 V1 TDRT time-out expires long before V DRT DD ): SLOW V RISE DD DD has reached its final min ...

Page 68

... Oscillator Configuration LP XT (1) HS (1) EC INTOSC EXTRC Note 1: PIC16F506 only MCLR) level. Note the responsibility of the application as MCLR and designer to ensure the use of the 1.125 ms nominal DRT will result in acceptable operation. Refer to Electrical Specifications for V stability requirements for this mode of operation. ...

Page 69

... Bit 6 (1) N/A OPTION GPWU GPPU T0CS (2) N/A OPTION RBWU RBPU Legend: Shaded boxes = Not used by Watchdog Timer. – = unimplemented, read as ‘0’ unchanged. Note 1: PIC12F510 only. 2: PIC16F506 only. © 2007 Microchip Technology Inc. PIC12F510/16F506 0 M Postscaler Postscaler 8-to-1 MUX PSA To Timer0 0 1 ...

Page 70

... This brown-out protection circuit employs Microchip Technology’s MCP809 microcon- troller supervisor. There are 7 different trip point selections to accommodate systems. goes DD BROWN-OUT PROTECTION CIRCUIT PIC12F510 PIC16F506 Q1 (2) MCLR (1) 40k is below a certain level such 0. BROWN-OUT PROTECTION CIRCUIT MCLR PIC12F510 PIC16F506 © 2007 Microchip Technology Inc. ...

Page 71

... If a wake-up on change occurs and the pins are not read before reentering Sleep, a wake-up will occur immediately even if no pins change while in Sleep mode. © 2007 Microchip Technology Inc. PIC12F510/16F506 Note 1: Caution: Right before entering Sleep, read register(s) CM1CON0 and CM2CON0. ...

Page 72

... Programming Specifications. A typical In-Circuit Serial Programming connection is shown in Figure 10-15. DS41268D-page 70 FIGURE 10-15: External Connector Signals + CLK (see program- Data I/O becomes the TYPICAL IN-CIRCUIT SERIAL PROGRAMMING CONNECTION To Normal Connections PIC12F510 PIC16F506 MCLR/V PP GP1/RB1 GP0/RB0 Normal Connections © 2007 Microchip Technology Inc. ...

Page 73

... Register bit field < > ∈ In the set of italics User defined term (font is courier) © 2007 Microchip Technology Inc. PIC12F510/16F506 All instructions are executed within a single instruction cycle, unless a conditional test is true or the program counter is changed as a result of an instruction. In this case, the execution takes two instruction cycles. One instruction cycle consists of four oscillator periods ...

Page 74

... 0000 0000 0100 2 None 101k kkkk kkkk 1 Z 1101 kkkk kkkk 1 None 1100 kkkk kkkk 1 None 0000 0000 0010 2 None 1000 kkkk kkkk 0000 0000 0011 1 None 0000 0000 0fff 1 Z 1111 kkkk kkkk © 2007 Microchip Technology Inc. Notes ...

Page 75

... The contents of the W register are AND’ed with register ‘f’. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’. © 2007 Microchip Technology Inc. PIC12F510/16F506 BCF Bit Clear f Syntax: ...

Page 76

... Operands: d ∈ [0,1] (f) → (dest) Operation: Status Affected: Z Description: The contents of register ‘f’ are complemented. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’. © 2007 Microchip Technology Inc. ...

Page 77

... Description: GOTO is an unconditional branch. The 9-bit immediate value is loaded into PC bits <8:0>. The upper bits of PC are loaded from STATUS <6:5>. GOTO is a two- cycle instruction. © 2007 Microchip Technology Inc. PIC12F510/16F506 INCF Increment f Syntax: [ label ] INCF f,d 0 ≤ f ≤ 31 Operands: d ∈ ...

Page 78

... NOP Operands: None Operation: No operation Status Affected: None Description: No operation. OPTION Load OPTION Register Syntax: [ label ] Option Operands: None Operation: (W) → Option Status Affected: None Description: The content of the W register is loaded into the OPTION register. © 2007 Microchip Technology Inc. f ...

Page 79

... Carry flag. If ‘d’ is ‘0’, the result is placed in the W register. If ‘d’ is ‘1’, the result is placed back in register ‘f’. register ‘f’ C © 2007 Microchip Technology Inc. PIC12F510/16F506 SLEEP Enter SLEEP Mode Syntax: [label ] SLEEP ...

Page 80

... Operation: Status Affected: Z Description: Exclusive OR the contents of the W register with register ‘f’. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’. © 2007 Microchip Technology Inc. f,d ...

Page 81

... PICSTART Plus Development Programmer - MPLAB PM3 Device Programmer - PICkit™ 2 Development Programmer • Low-Cost Demonstration and Development Boards and Evaluation Kits © 2007 Microchip Technology Inc. PIC12F510/16F506 12.1 MPLAB Integrated Development Environment Software The MPLAB IDE software brings an ease of software development previously unseen in the 8/16-bit micro- controller market ...

Page 82

... MPLAB C30 C Compilers, and the MPASM and MPLAB ASM30 Assemblers. The software simulator offers the flexibility to develop and debug code outside of the hardware laboratory environment, making it an excellent, economical software development tool. ® DSCs on an instruction © 2007 Microchip Technology Inc. ...

Page 83

... Microchip Technology Inc. PIC12F510/16F506 12.9 MPLAB ICD 2 In-Circuit Debugger Microchip’s In-Circuit Debugger, MPLAB ICD ...

Page 84

... SEEVAL evaluation system, Sigma-Delta ADC, flow rate sensing, plus many more. Check the Microchip web page (www.microchip.com) and the latest “Product Selector Guide” (DS00148) for the complete list of demonstration, development and evaluation kits. © 2007 Microchip Technology Inc. ® ...

Page 85

... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. © 2007 Microchip Technology Inc. PIC12F510/16F506 ............................................................................... -0. )...................................................................................................................± ...

Page 86

... VOLTAGE-FREQUENCY GRAPH, -40°C ≤ T FIGURE 13-1: 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2 MAXIMUM OSCILLATOR FREQUENCY TABLE (PIC12F510) FIGURE 13- EXTRC INTOSC 0 DS41268D-page 84 ≤ +125°C (PIC12F510 Frequency (MHz) 200 kHz 4 MHz 8 MHz Frequency (MHz MHz © 2007 Microchip Technology Inc. ...

Page 87

... VOLTAGE FREQUENCY GRAPH, -40°C ≤ T FIGURE 13-3: 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2 MAXIMUM OSCILLATOR FREQUENCY TABLE (PIC16F506) FIGURE 13- EXTRC INTOSC © 2007 Microchip Technology Inc. PIC12F510/16F506 ≤ +125°C (PIC16F506 Frequency (MHz) 200 kHz 4 MHz 8 MHz Frequency (MHz) ...

Page 88

... V = 2.0V (high range) DD μ 5.0V (high range) DD μ 2.0V (0.6V reference and DD 1 comparator enabled) μ 5.0V (0.6V reference and DD 1 comparator enabled) μA 2.0V μA 5.0V , T0CKI = V , MCLR = except that the device is in Sleep DD © 2007 Microchip Technology Inc. ; ...

Page 89

... If a module current is listed, the current is for that specific module enabled and the device in Sleep. 6: Does not include current through /2R (mA) with R DD EXT EXT © 2007 Microchip Technology Inc. PIC12F510/16F506 Standard Operating Conditions (unless otherwise specified) Operating Temperature 40°C ≤ T (1) Min Typ Max 2 ...

Page 90

... OH V – 0.7 — — -1.0 mA — — XT, HS and LP modes when external clock is used to drive OSC1. — — © 2007 Microchip Technology Inc. Conditions ≤ 5.5V DD ≤ 5.5V DD range PIN SS ≤ Pin at high-impedance PIN DD ≤ V PIN DD ≤ XT, HS and LP oscillator ...

Page 91

... COMPARATOR VOLTAGE REFERENCE (CV Sym Characteristics CV Resolution RES Absolute Accuracy Unit Resistor Value (R) (1) Settling Time * These parameters are characterized but not tested. Note 1: Settling time measured while V TABLE 13-3: A/D CONVERTER CHARACTERISTICS (PIC16F506/PIC12F510) Param Sym Characteristic No. A01 N Resolution R A03 E Integral Error IL A04 E ...

Page 92

... FIGURE 13-6: EXTERNAL CLOCK TIMING Q4 OSC1 DS41268D-page 90 T Time mc MCLR osc Oscillator os OSC1 t0 T0CKI wdt Watchdog Timer P Period R Rise V Valid Z High-impedance Legend for all pins except OSC2 for OSC2 in XT modes when external clock is used to drive OSC1 © 2007 Microchip Technology Inc. ...

Page 93

... LP Oscillator mode ns XT Oscillator mode ns HS/EC Oscillator mode (PIC16F506 only) μs LP Oscillator mode ns EXTRC Oscillator mode ns XT Oscillator mode ns HS/EC Oscillator mode (PIC16F506 only) μs LP Oscillator mode Oscillator μs LP Oscillator ns HS/EC Oscillator (PIC16F506 only Oscillator ns LP Oscillator ns HS/EC Oscillator (PIC16F506 only) DS41268D-page 91 ...

Page 94

... MHz 20, 21 Conditions 25° 2.5V ≤ V ≤ 5.5V DD 0°C ≤ T ≤ +85°C A 2.0V ≤ V ≤ 5.5V DD -40°C ≤ T ≤ +85°C (Ind.) A -40°C ≤ T ≤ +125°C (Ext New Value © 2007 Microchip Technology Inc. ...

Page 95

... I/O pin Note 1: I/O pins must be taken out of High-Impedance mode by enabling the output drivers in software. 2: Runs in MCLR or WDT Reset only in XT, LP and HS modes. © 2007 Microchip Technology Inc. PIC12F510/16F506 -40°C ≤ T ≤ +85°C (industrial) A -40°C ≤ T ≤ +125°C (extended) ...

Page 96

... 5.0V (Industrial 5.0V (Extended ≤ +85°C (industrial) A -40°C ≤ T ≤ +125°C (extended) A (1) Max Units Conditions — — ns — — ns — — ns — — ns — — ns Whichever is greater Prescale Value (1, 2, 4,..., 256) © 2007 Microchip Technology Inc. ...

Page 97

... RB0 (GP0)/RB1 (GP1) 2.0 - 125 5.5 - 125 RB3 (GP3) 2.0 - 125 5.5 - 125 © 2007 Microchip Technology Inc. PIC12F510/16F506 Min Typ 73K 105K 73K 113K 82K 123K 86K 132k 15K 21K 15K 22K 19K 26k 23K 29K 63K 81K 77K ...

Page 98

... PIC12F510/16F506 NOTES: DS41268D-page 96 © 2007 Microchip Technology Inc. ...

Page 99

... V OVER 1,400 Typical: Statistical Mean @25°C 1,200 Maximum: Mean (Worst-Case Temp) + 3σ (-40°C to 125°C) 1,000 800 600 400 200 0 2.0 2.5 © 2007 Microchip Technology Inc. PIC12F510/16F506 OSC XT Mode 4 MHz 4 MHz 3.0 3.5 4.0 4 Maximum Typical 5.0 5.5 ...

Page 100

... Mode all Peripherals Disabled) 3.0 3.5 4.0 V (V) DD vs. V (SLEEP MODE, ALL PERIPHERALS DISABLED) DD Maximum (Sleep Mode all Peripherals Disabled) Max. 125°C Max. 85°C 3.0 3.5 4.0 V (V) DD 4.5 5.0 5.5 4.5 5.0 5.5 © 2007 Microchip Technology Inc. ...

Page 101

... FIGURE 14-5: TYPICAL WDT Typical: Statistical Mean @25°C Maximum: Mean (Worst-Case Temp) + 3σ 7 (-40°C to 125° 2.0 2.5 © 2007 Microchip Technology Inc. PIC12F510/16F506 vs. V (COMPARATOR ENABLED 3.0 3.5 4.0 V ( 3.0 3.5 4.0 V (V) DD Maximum Typical 4 ...

Page 102

... PD DD Maximum Max. 125°C Max. 85°C 3.0 3.5 4.0 V (V) DD OVER TEMPERATURE (NO PRESCALER) DD Typical: Statistical Mean @25°C Maximum: Mean (Worst-Case Temp) + 3σ (-40°C to 125°C) 3.0 3.5 4.0 V (V) DD 4.5 5.0 5.5 4.5 5.0 5.5 © 2007 Microchip Technology Inc. ...

Page 103

... Microchip Technology Inc. PIC12F510/16F506 = 3.0V) DD (VDD = 3V, -40×C TO 125×C) Max. 125°C Max. 85°C Typical 25°C Min. -40°C 6.5 7.0 7.5 8.0 8 ...

Page 104

... DS41268D-page 102 = 3.0V) DD -1.5 -2.0 -2.5 I (mA 5.0V -1.5 -2.0 -2.5 -3.0 -3.5 I (mA) OH Max. -40°C Typ. 25°C Min. 125°C -3.0 -3.5 -4.0 Max. -40°C Typ. 25°C Min. 125°C -4.0 -4.5 -5.0 © 2007 Microchip Technology Inc. ...

Page 105

... Typical: Statistical Mean @25°C 3.5 Maximum: Mean (Worst-Case Temp) + 3σ (-40°C to 125°C) 3.0 2.5 2.0 1.5 1.0 0.5 2.0 2.5 © 2007 Microchip Technology Inc. PIC12F510/16F506 vs (TTL Input, -40×C TO 125×C) Max. -40°C Typ. 25°C Min. 125°C 3.0 3.5 4.0 ...

Page 106

... DEVICE RESET TIMER (HS, XT AND LP) vs 2.0 2.5 Note: See Table 13-7 if another clock mode is selected. DS41268D-page 104 DD Maximum (Sleep Mode all Peripherals Disabled) Max. 125°C Max. 85°C Typical 25°C Min. -40°C 3.0 3.5 4.0 V (V) DD 4.5 5.0 5.5 © 2007 Microchip Technology Inc. ...

Page 107

... PIC device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. © 2007 Microchip Technology Inc. PIC12F510/16F506 Example 12F510/P 017 0410 Example PIC16F506-I/P 0410017 Example PIC12F510-I /SN0410 017 Example ...

Page 108

... PIC12F510/16F506 15.2 Package Marking Information (Cont’d) 14-Lead SOIC (3.90 mm) XXXXXXXXXXX XXXXXXXXXXX YYWWNNN 8-Lead MSOP XXXXXX YWWNNN 14-Lead TSSOP (4.4 mm) XXXXXXXX YYWW NNN DS41268D-page 106 Example PIC16F506 -I/SL 0410017 Example 602/MS 310017 Example 16F506/ST 0410 017 © 2007 Microchip Technology Inc. ...

Page 109

... N NOTE © 2007 Microchip Technology Inc. PIC12F510/16F506 DS41268D-page 107 ...

Page 110

... PIC12F510/16F506 N NOTE DS41268D-page 108 © 2007 Microchip Technology Inc. ...

Page 111

... N NOTE © 2007 Microchip Technology Inc. PIC12F510/16F506 φ α c β DS41268D-page 109 ...

Page 112

... PIC12F510/16F506 DS41268D-page 110 © 2007 Microchip Technology Inc. ...

Page 113

... D N NOTE TOP VIEW A3 © 2007 Microchip Technology Inc. PIC12F510/16F506 EXPOSED PAD BOTTOM VIEW A NOTE NOTE DS41268D-page 111 ...

Page 114

... PIC12F510/16F506 N NOTE DS41268D-page 112 φ α c β © 2007 Microchip Technology Inc. ...

Page 115

... D N NOTE © 2007 Microchip Technology Inc. PIC12F510/16F506 φ L DS41268D-page 113 ...

Page 116

... PIC12F510/16F506 D N NOTE DS41268D-page 114 © 2007 Microchip Technology Inc. φ L ...

Page 117

... Revised Table 1-1; Table 4-1, Table 4-2; Figure 4-5; Register 7-1 (Note 1); Register 8-1; Figure 13-4; 13.1 - 13.3; Table 13-1, Table 13-3, Table 13-6, Table 13-7, Table 13-9; Figure 14-4, Figure 14-14; Section 14.0; Packaging; Product ID System. © 2007 Microchip Technology Inc. PIC12F510/16F506 DS41268D-page 115 ...

Page 118

... PIC12F510/16F506 NOTES: DS41268D-page 116 © 2007 Microchip Technology Inc. ...

Page 119

... INDEX A ALU ....................................................................................... 9 Assembler MPASM Assembler..................................................... 80 B Block Diagram Comparator for the PIC12F510................................... 46 Comparator for the PIC16F506................................... 46 On-Chip Reset Circuit ................................................. 64 Timer0......................................................................... 39 TMR0/WDT Prescaler................................................. 42 Watchdog Timer.......................................................... 67 Brown-Out Protection Circuit .............................................. Compilers MPLAB C18 ................................................................ 80 MPLAB C30 ................................................................ 80 Carry ..................................................................................... 9 Clocking Scheme ................................................................ 14 Code Protection ............................................................ 55, 69 Configuration Bits................................................................ 55 Configuration Word (PIC12F510) ....................................... 56 Configuration Word (PIC16F506) ...

Page 120

... TMR0 with External Clock........................................... 41 Timing Diagrams and Specifications................................... 91 Timing Parameter Symbology and Load Conditions........... 91 TRIS Registers.................................................................... 27 W Wake-up from Sleep ........................................................... 69 Watchdog Timer (WDT) ................................................ 55, 66 Period.......................................................................... 66 Programming Considerations ..................................... 66 WWW Address.................................................................. 108 WWW, On-Line Support........................................................ 3 Z Zero bit .................................................................................. 9 DS41268D-page 118 © 2007 Microchip Technology Inc. ...

Page 121

... To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions. © 2007 Microchip Technology Inc. PIC12F510/16F506 CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • ...

Page 122

... What deletions from the document could be made without affecting the overall usefulness there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS41268D-page 120 Total Pages Sent ________ FAX: (______) _________ - _________ N Literature Number: DS41268D © 2007 Microchip Technology Inc. ...

Page 123

... Pattern: QTP, SQTP Code or Special Requirements (blank otherwise) © 2007 Microchip Technology Inc. PIC12F510/16F506 XXX Examples: Pattern a) PIC16F506-E/P 301 = Extended Temp., PDIP package, QTP pattern #301 b) PIC16F506-I/SN = Industrial Temp., SOIC package c) PIC16F506T-E/P = Extended Temp., PDIP package, Tape and Reel (Industrial) (Extended) ...

Page 124

... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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