MT18HTF6472DY-40EB2 Micron Technology Inc, MT18HTF6472DY-40EB2 Datasheet - Page 10

• Manufacturer Part Number: MT18HTF6472DY-40EB2
• Description: MODULE SDRAM DDR2 512MB 240DIMM
• Manufacturer: Micron Technology Inc

Specifications of MT18HTF6472DY-40EB2

• Memory Type: DDR2 SDRAM
• Memory Size: 512MB
• Speed: 400MT/s
• Package / Case: 240-DIMM
• Main Category: DRAM Module
• Sub-category: DDR2 SDRAM
• Module Type: 240RDIMM
• Device Core Size: 72b
• Organization: 64Mx72
• Total Density: 512MByte
• Chip Density: 256Mb
• Access Time (max): 60ps
• Maximum Clock Rate: 400MHz
• Operating Supply Voltage (typ): 1.8V
• Operating Current: 1.17A
• Number Of Elements: 18
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 240
• Mounting: Socket
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 12:
PDF: 09005aef80e935cd/Source: 09005aef80e934a6
HTF18C64_128_256x72D.fm - Rev. E 2/07 EN
Parameter/Condition
Operating one bank active-precharge current:
t
commands; Address bus inputs are switching; Data bus inputs are switching
Operating one bank active-read-precharge current: I
CL = CL (I
t
bus inputs are switching; Data pattern is same as I
Precharge power-down current: All device banks idle;
LOW; Other control and address bus inputs are stable; Data bus inputs are
floating
Precharge quiet standby current: All device banks idle;
is HIGH, S# is HIGH; Other control and address bus inputs are stable; Data bus
inputs are floating
Precharge standby current: All device banks idle;
HIGH, S# is HIGH; Other control and address bus inputs are switching; Data bus
inputs are switching
Active power-down current: All device banks open;
t
inputs are stable; Data bus inputs are floating
Active standby current: All device banks open;
t
commands; Other control and address bus inputs are switching; Data bus inputs
are switching
Operating burst write current: All device banks open; Continuous burst
writes; BL = 4, CL = CL (I
t
inputs are switching; Data bus inputs are switching
Operating burst read current: All device banks open; Continuous burst
reads; I
t
commands; Address bus inputs are switching; Data bus inputs are switching
Burst refresh current:
interval; CKE is HIGH, S# is HIGH between valid commands; Other control and
address bus inputs are switching; Data bus inputs are switching
Self refresh current: CK and CK# at 0V; CKE ≤ 0.2V; Other control and address
bus inputs are floating; Data bus inputs are floating
Operating bank interleave read current: All device banks interleaving
reads; I
t
S# is HIGH between valid commands; Address bus inputs are stable during
deselects; Data bus inputs are switching
RC =
RCD =
CK =
RAS =
RP =
RAS =
CK =
t
t
t
t
RP (I
RC (I
CK (I
CK (I
t
t
OUT
OUT
t
RAS MAX (I
RAS MAX (I
RCD (I
DD
DD
DD
DD
= 0mA; BL = 4, CL = CL (I
= 0mA; BL = 4, CL = CL (I
DD
), AL = 0;
); CKE is HIGH, S# is HIGH between valid commands; Address bus
),
DDR2 I
Values shown for MT47H128M8 DDR2 SDRAM only and are computed from values specified in the
1Gb (128 Meg x 8) component data sheet
); CKE is LOW; Other control and address bus
),
DD
t
t
RAS =
RC =
); CKE is HIGH, S# is HIGH between valid commands; Address
Notes:
DD
DD
t
t
),
),
CK =
RC (I
DD
t
RAS MIN (I
t
t
DD
RP =
RP =
t
CK =
Specifications and Conditions (Die Revision A) – 2GB
), AL = 0;
DD
t
CK (I
1. Value calculated as one module rank in this operating condition; all other module ranks in
2. Value calculated reflects all module ranks in this operating condition.
),
t
t
RP (I
RP (I
t
t
CK (I
I
RRD =
DD
DD
DD
2P (CKE LOW) mode.
DD
DD
),
512MB, 1GB, 2GB (x72, ECC, DR) 240-Pin DDR2 SDRAM RDIMM
DD
DD
t
DD
); CKE is HIGH, S# is HIGH between valid
CK =
t
); CKE is HIGH, S# is HIGH between valid
); CKE is HIGH, S# is HIGH between valid
RC =
t
), AL = 0;
), AL =
); REFRESH command at every
RRD (I
t
CK (I
t
RC (I
DD
t
RCD (I
DD
),
t
DD
CK =
t
),
RCD =
t
DD
),
CK =
t
t
DD
RAS =
t
CK =
t
4W
RAS =
CK =
t
CK (I
) - 1 x
t
t
CK (I
RCD (I
t
t
OUT
CK (I
CK =
t
t
DD
t
CK (I
RAS MAX (I
t
CK =
10
RAS MIN (I
t
DD
),
CK (I
= 0mA; BL = 4,
Fast PDN exit
MR[12] = 0
Slow PDN exit
MR[12] = 1
DD
DD
t
),
DD
CK (I
t
); CKE is HIGH,
),
CK (I
DD
); CKE is
);
t
DD
RFC (I
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DD
DD
DD
); CKE is
); CKE
),
),
DD
)
Symbol
I
I
I
I
I
I
I
DD
DD
DD
DD
I
I
DD
DD
DD
I
I
I
DD
DD
DD
DD
DD
4W
2Q
2N
3N
2P
3P
4R
0
1
5
6
7
1
1
2
2
1
2
2
2
2
2
2
2
Electrical Specifications
1,080
1,260
1,503 1,233
1,503 1,368
4,680 4,500
2,763 2,673
-667
873
963
126
990
720
180
126
©2003 Micron Technology, Inc. All rights reserved.
-53E
783
918
126
738
810
540
180
990
126
1,053
1,053
3,960
2,403
-40E
693
783
126
630
720
450
180
810
126
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA