MT16VDDF12864HG-40BF2 Micron Technology Inc, MT16VDDF12864HG-40BF2 Datasheet - Page 26

• Manufacturer Part Number: MT16VDDF12864HG-40BF2
• Description: MODULE DDR SDRAM 1GB 200-SODIMM
• Manufacturer: Micron Technology Inc

Specifications of MT16VDDF12864HG-40BF2

• Memory Type: DDR SDRAM
• Memory Size: 1GB
• Speed: 400MT/s
• Package / Case: 200-SODIMM
• Main Category: DRAM Module
• Sub-category: DDR SDRAM
• Module Type: 200SODIMM
• Device Core Size: 64b
• Organization: 128Mx64
• Total Density: 1GByte
• Chip Density: 512Mb
• Maximum Clock Rate: 400MHz
• Operating Supply Voltage (typ): 2.6V
• Operating Current: 1.6A
• Number Of Elements: 16
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.5V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 200
• Mounting: Socket
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 20: Serial Presence-Detect Matrix
“1”/“0”: Serial Data, “driven to HIGH”/“driven to LOW”
pdf: 09005aef80b57837, source: 09005aef80b577fa
DDAF16C64_128x64HG.fm - Rev. D 9/04 EN
BYTE
36-40
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
0
1
2
3
4
5
6
7
8
9
Number of SPD Bytes Used by Micron
Total Number of Bytes in SPD Device
Fundamental Memory Type
Number of Row Addresses on Assembly
Number of Column Addresses on Assembly
Number of Physical Ranks on DIMM
Module Data Width
Module Data Width (Continued)
Module Voltage Interface Levels
SDRAM Cycle Time,
SDRAM Access from Clock,
Module Configuration Type
Refresh Rate/type
SDRAM Device Width (Primary DDR SDRAM)
Error-checking DDR SDRAM Data Width
Minimum Clock Delay, Back-to-Back Random
Column Access
Burst Lengths Supported
Number of Banks on DDR SDRAM Device
CAS Latencies Supported
CS Latency
WE Latency
SDRAM Module Attributes
SDRAM Device Attributes: General
SDRAM Cycle Time,
SDRAM Access From Clock,
2.5)
SDRAM Cycle Time,
SDRAM Access From CK,
Minimum Row Precharge Time,
Minimum Row Active to Row Active,
Minimum RAS# to CAS# Delay,
Minimum RAS# Pulse Width,
Module Rank Density
Address and Command Setup Time,
Address and Command Hold Time,
Data/Data Mask Input Setup Time,
Data/Data Mask Input Hold Time,
Reserved
DESCRIPTION
t
t
t
CK (CAS Latency = 3)
CK (CAS Latency = 2.5)
CK (CAS Latency = 2)
t
AC (CAS Latency = 2)
t
t
AC (CAS Latency = 3)
AC (CAS Latency =
t
RAS
t
RCD
t
RP
t
DH
t
t
DS
IH
t
IS
t
RRD
0.75ns (Set for PC2100/
26
Unbuffered/Diff. Clock
PC1600 Compatibility)
PC1600 Compatibility)
7.5ns (Set for PC2100/
Fast/Concurrent Auto
0.7ns (Set for PC2700
6ns (Set for PC2700
ENTRY (VERSION)
256MB, 512MB
Compatibility)
Compatibility)
0.40ns (-40B)
0.40ns (-40B)
DDR SDRAM
0.7ns (-40B)
3, 2.5 and 2
0.6ns (-40B)
0.6ns (-40B)
15ns (-40B)
10ns (-40B)
40ns (-40B)
7.8µs/SELF
5ns (-40B)
Precharge
15ns (-40B)
SSTL 2.5V
Non-ECC
1 clock
10, 11
2, 4, 8
None
512MB, 1GB (x64, DR) PC3200
128
256
Micron Technology, Inc., reserves the right to change products or specifications without notice.
13
64
2
0
8
4
0
1
200-PIN DDR SODIMM
MT16VDDF6464H MT16VDDF12864H
0D
0A
80
08
07
02
40
00
04
50
70
00
82
08
00
01
0E
04
1C
01
02
20
C0
60
70
75
75
3C
28
3C
28
40
60
60
40
40
00
©2004 Micron Technology, Inc.
0D
0B
1C
C0
3C
3C
80
08
07
02
40
00
04
50
70
00
82
08
00
01
0E
04
01
02
20
60
70
75
75
28
28
80
60
60
40
40
00