IDT72P51339L6BBI8 IDT, Integrated Device Technology Inc, IDT72P51339L6BBI8 Datasheet - Page 77

• Manufacturer Part Number: IDT72P51339L6BBI8
• Description: IC FLOW CTRL 36BIT 256-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT72P51339L6BBI8

• Configuration: Dual
• Density: 576Kb
• Access Time (max): 3.7ns
• Word Size: 36b
• Organization: 2Kx36x8
• Sync/async: Synchronous
• Expandable: Yes
• Bus Direction: Uni-Directional
• Package Type: BGA
• Clock Freq (max): 166MHz
• Supply Current: 150mA
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72P51339L6BBI8

Cycle:
*A*
*AA* Status word 4 of device 0 is selected for the PAFn bus. The bus is currently providing status of a previously selected status word, Quad Y of device X.
*B*
*BB* Queue 31 of device 0 is selected on the write port.
*C*
*CC* PAFn continues to show status of Quad4 D0.
*D*
*DD* No write operation.
*E*
*EE* PAF[7] goes HIGH to show that D0 Q31 is not almost empty due to the read on cycle *C*.
*F*
*FF* Word, Wy+1 is written into D0 Q31.
*G*
*GG* PAF[7] and the discrete PAF flag go LOW to show the write on cycle *DD* causes Q31 of D0 to again go almost full.
*H*
*I*
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES
(8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592
Device 0
Bus
Queue 31 of device 0 is selected for read operations.
The last word in the output register is available on Qout. OE was previously taken LOW so the output bus is in Low-Impedance.
No read operation.
Word, Wx+1 is read out from the previous queue due to the FWFT effect.
The PAFn bus is updated with the status word selected on the previous cycle, D0 Quad 4. PAF[7] is LOW showing the status of queue 31.
The PAFn outputs of the device previously selected on the PAFn bus go to High-Impedance.
A new status word, Quad 0 of Device 7 is selected for the PAFn bus.
Word, Wd-m+1 is read from Q31 D0 due to the FWFT operation. This read is at the PAFn boundary of queue D0 Q31. This read will cause the PAF[7] output to go from
LOW to HIGH (almost full to not almost full), after a delay t
No read operations occur, REN is HIGH.
The active queue PAF flag of device 0 goes from High-Impedance to Low-Impedance.
Word, Wy is written into D0 Q31.
Queue 2 of Device 6 is selected for read operations.
Word, Wd-m+2 is read out due to FWFT operation.
Word, Wy+2 is written into D0 Q31.
No read operation.
Word, W0 is read from Q0 of D6, selected on cycle *F*, due to FWFT.
Device 0
WRADD
WADEN
RDADD
RADEN
WCLK
RCLK
ESTR
FSTR
PAFn
PAFn
PAFn
WEN
Prev.
Qout
REN
PAF
Din
OE
t
D
D
QS
t
AS
t
t
X
X
STS
AS
SW y
SW y
000 11111
D0Q31
D0 quad3
t
OLZ
*A*
*AA*
000 00011
t
t
t
AH
QH
STH
t
AH
t
QS
t
AS
W
*B*
HIGH - Z
D0 Q31
X
*BB*
t
t
AH
QH
Figure 65. PAF n - Direct Mode, Flag Operation
HIGH-Z
*C*
SKEW3
*CC*
t
A
t
SKEW3
1
t
+ WCLK + tPAF. If t
STS
t
t
AS
PAFHZ
t
PAFLZ
111 00000
D7 SW 0
D0SW3
D0SW3
*D*
W
*DD*
X +1
t
77
t
AH
2
STH
0xxx xxxx
0xxx xxxx
SKEW3
t
ENS
*E*
t
DS
is violated add an extra WCLK cycle.
Word W
D0 Q31
*EE*
t
A
t
QS
3
t
t
AS
DH
y
t
t
PAF
PAFLZ
110 00010
D6Q2
*F*
D0SW3
D0SW3
D0 Q31
W
t
DS
D-M+1
D0 Q31
*FF*
W
t
QH
t
AH
y+1
HIGH-Z
t
DH
1xxx xxxx
1xxx xxxx
*G*
t
DS
COMMERCIAL AND INDUSTRIAL
t
A
D0 Q31
*GG*
W
y+2
t
DH
t
ENH
t
t
PAF
WAF
TEMPERATURE RANGES
*H*
W
D0 Q31
D - M + 2
D0SW3
D0SW3
AUGUST 4, 2005
*I*
0xxx xxxx
0xxx xxxx
t
A
D6 Q2
6716 drw73
W
0