IDT72P51339L6BBI8 IDT, Integrated Device Technology Inc, IDT72P51339L6BBI8 Datasheet - Page 49

• Manufacturer Part Number: IDT72P51339L6BBI8
• Description: IC FLOW CTRL 36BIT 256-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT72P51339L6BBI8

• Configuration: Dual
• Density: 576Kb
• Access Time (max): 3.7ns
• Word Size: 36b
• Organization: 2Kx36x8
• Sync/async: Synchronous
• Expandable: Yes
• Bus Direction: Uni-Directional
• Package Type: BGA
• Clock Freq (max): 166MHz
• Supply Current: 150mA
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72P51339L6BBI8

PACKET MODE DEMARCATION BITS
packet mode operation. In packet mode the IDT72P51339/72P51349/72P51359/
72P51369 provides the functionality to demarcate packets within a queue. The
demarcation functionality is only available in packet mode and is used to
generate the Packet Ready (PR) flag.
bits [35:32]. The demarcation bit assignments are; bit 35 End of Packet (EOP),
bit 34 Start of Packet (SOP), bit 33 Almost End of Packet (AEOP) and bit 32 Almost
Start of Packet (ASOP).
NOTES:
1. In a 36 bit word to 18 bit word configuration the 36 bit word is converted to two (2)
2. An SOP and EOP may not occur within a same word.
3. The x18 bit even words (0,2,4, etc.) contain demarcation bits 32 (ASOP) and 34
4. The x18 bit odd words (1,3,5, etc.) contain demarcation bits 33 (AEOP) and 35
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES
(8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592
The IDT72P51339/72P51349/72P51359/72P51369 can be configured for
The demarcation of packets/information is accomplished with the demarcation
18 bit words.
17
32, 34
17
35,33
(SOP).
(EOP).
Figure 28. 36bit to 18bit word configuration
35
<31:16>
NOTES:
1. A Start of Packet (SOP) and End of Packet (EOP) may not occur within a same word.
2. The x36 bit words locate SOP and EOP as follows;
<15:0>
a. bit 35 is EOP
b. bit 34 is SOP.
0
0
Figure 27. 36bit to 36bit word configuration
(even word)
(odd word)
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and read interface to independent word lengths (i.e. 9 bit word, 18 bit word, 36
bit word), the demarcation bits are located within their respective word length.
For example within a 36 bit to 36 bit word bus matching configuration bit 35 is
designated as the End of Packet (EOP) and bit 34 is Start of Packet (SOP). In
an 18 bit to 18 bit word bus matching configuration bit 17 is designated End of
Packet (EOP) and bit 16 is Start of Packet. The minimum packet word length
required by the IDT72P51339/72P51349/72P51359/72P51369 is four (4) of
the largest words specified within a bus matching configuration. Refer to Figure
27-35 for designated locations of the demarcation bits within a specific word
configuration.
NOTES:
1. In a 36 bit word to 9 bit word configuration the 36 bit word is converted into four (4)
2. An SOP and EOP may not occur within a same word.
3. The x9 bit words contain the demarcation bits as follows;
During packet mode bus matching, which is the ability to set the write interface
9 bit words.
a. Bit 8 in Word “A” is the Start of Packet (SOP)
b. Bit 8 in Word “B” is the Almost Start of Packet (ASOP).
c. Bit 8 in Word “C” is the Almost End of Packet (AEOP).
d. Bit 8 in Word “D” is the End of Packet (EOP).
Figure 29. 36bit to 9bit word configuration
A
B
C
D
8
34
32
33
35
<7:0>
<15:8>
<23:16>
<31:24>
COMMERCIAL AND INDUSTRIAL
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TEMPERATURE RANGES
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0
0
AUGUST 4, 2005