IDT72P51339L6BBI8 IDT, Integrated Device Technology Inc, IDT72P51339L6BBI8 Datasheet
IDT72P51339L6BBI8
Specifications of IDT72P51339L6BBI8
Available stocks
Related parts for IDT72P51339L6BBI8
IDT72P51339L6BBI8 Summary of contents
Page 1
FEATURES • • • • • Choose from among the following memory density options: IDT72P51339 Total Available Memory = 589,824 bits IDT72P51349 Total Available Memory = 1,179,648 bits ...
Page 2
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 Features ........................................................................................................................................................................................................................ 1 Description ................................................................................................................................................................................................................... 5 Pin configuration ......................................................................................................................................................................................................... 7 Detailed Description .................................................................................................................................................................................................... 8 Pin Descriptions ......................................................................................................................................................................................................... 10 Pin number table ........................................................................................................................................................................................................ 16 ...
Page 3
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 Figure 1. Multi-Queue Flow-Control Device Block Diagram .............................................................................................................................................. 6 Figure 2a. AC Test Load ................................................................................................................................................................................................ 19 Figure 2b. Lumped Capacitive Load, Typical Derating ...
Page 4
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 List of Figures (Continued) Figure 55. Reading in Packet Mode during a Queue change ......................................................................................................................................... 70 Figure 56. Writing Demarcation Bits (Packet Mode) ...
Page 5
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 DESCRIPTION The IDT72P51339/72P51349/72P51359/72P51369 multi-queue flow-con- trol devices are single chips with discrete configurable FIFO queues. All queues within the device ...
Page 6
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 WCLK WEN WCS 8 WRADD Write Control Logic WADEN Write Pointers PAF FSTR 8 General Flag PAFn Monitor FSYNC FXO FXI FF/IR Active ...
Page 7
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 PIN CONFIGURATION A1 BALL PAD CORNER A D14 D13 D12 D10 B D15 D16 D11 D9 C D17 D18 D19 D8 D D20 ...
Page 8
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 DETAILED DESCRIPTION MULTI-QUEUE STRUCTURE The IDT multi-queue flow-control device has a single data input port and single data output port with up to ...
Page 9
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 (bit 35) constituting the entire packet. A packet can be any length the user desires the total available memory in the ...
Page 10
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 PIN DESCRIPTIONS Symbol & Name I/O TYPE (Pin No.) BM [3:0] Bus Matching HSTL-LVTTL These pins define the bus width of the input ...
Page 11
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 PIN DESCRIPTIONS (CONTINUED) Symbol & Name I/O TYPE Pin No. FF/IR Full Flag/ HSTL-LVTTL This pin provides the full flag output for the ...
Page 12
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 PIN DESCRIPTIONS (CONTINUED) Symbol & Name I/O TYPE Pin No. IOSEL IO Select LVTTL (C8) INPUT (1) MAST Master Device HSTL-LVTTL The state ...
Page 13
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 PIN DESCRIPTIONS (CONTINUED) Symbol & Name I/O TYPE Pin No. PR Packet Ready HSTL-LVTTL If packet mode has been selected this flag output ...
Page 14
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 PIN DESCRIPTIONS (CONTINUED) Symbol & Name I/O TYPE (Pin No.) SCLK Serial Clock HSTL-LVTTL If serial programming of the multi-queue device has been ...
Page 15
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 PIN DESCRIPTIONS (CONTINUED) Symbol & Name I/O TYPE Pin No. WADEN Write Address HSTL-LVTTL that a write queue selection cannot be made, (WADEN ...
Page 16
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 PIN NUMBER TABLE Symbol Name I/O TYPE D[35:0] Data Input Bus HSTL-LVTTL D35-J3, D(34-32)-H(3-1), D(31-29)-G(3-1), D(28-26)-F(3-1), D(25-23)-E(3-1), D(22-20)-D(3-1), Din INPUT Q[35:0] Data Output ...
Page 17
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 ABSOLUTE MAXIMUM RATINGS Symbol Rating V Terminal Voltage TERM with respect to GND T Storage Temperature STG I DC Output Current OUT NOTES: ...
Page 18
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 DC ELECTRICAL CHARACTERISTICS (Commercial 1.8V ± 0.10V 0°C to +70°C;Industrial Symbol Parameter I Input Leakage Current ...
Page 19
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 HSTL 1.5V AC TEST CONDITIONS Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels NOTE 1.5V ...
Page 20
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 AC ELECTRICAL CHARACTERISTICS (Commercial 1.8V ± 0.10V 0°C to +70°C;Industrial Symbol Parameter f Clock Cycle Frequency ...
Page 21
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 AC ELECTRICAL CHARACTERISTICS (CONTINUED) (Commercial 1.8V ± 0.10V 0°C to +70°C;Industrial Symbol Parameter RCLK to PAE ...
Page 22
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 FUNCTIONAL DESCRIPTION MASTER RESET A Master Reset is performed by toggling the MRS input from HIGH to LOW to HIGH. During a master ...
Page 23
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 SERIAL PROGRAMMING The multi-queue flow-control device is a fully programmable device, provid- ing the user with flexibility in how queues are configured in ...
Page 24
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 When Multi-Queue devices are connected in an Expansion Configuration, the SENI signal of the first device in a chain must be held LOW. ...
Page 25
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 QUEUE DESCRIPTION CONFIGURATION OF THE IDT MULTI-QUEUE FLOW-CONTROL DEVICE The IDT72P51339/72P51349/72P51359/72P51369 multi-queue flow-con- trol devices can be configured in distinct modes, namely Packet ...
Page 26
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 STANDARD MODE OPERATION WRITE QUEUE SELECTION AND WRITE OPERATION (STANDARD MODE) The IDT72P51339/72P51349/72P51359/72P51369 multi-queue flow-con- trol devices can be configured ...
Page 27
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 READ QUEUE SELECTION AND READ OPERATION (STANDARD MODE) The IDT72P51339/72P51349/72P51359/72P51369 multi-queue flow-con- trol devices can be configured maximum of 8 ...
Page 28
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 PACKET MODE OPERATION The Packet mode operation provides the capability where, user defined packets or frames can be written to the device as ...
Page 29
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 SWITCHING QUEUES ON THE WRITE PORT The IDT72P51339/72P51349/72P51359/72P51369 multi-queue flow-con- trol devices can be configured maximum of 8 queues. Data ...
Page 30
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 The IDT72P51339/72P51349/72P51359/72P51369 multi-queue flow-con- trol device supports writing and reading from either the same queue of from different queues. The device also supports ...
Page 31
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 SWITCHING QUEUES ON THE READ PORT The IDT72P51339/72P51349/72P51359/72P51369 multi-queue flow-con- trol devices can be configured maximum of 8 queues. Data ...
Page 32
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 SIMULTANEOUS QUEUE SWITCHING The IDT72P51339/72P51349/72P51359/72P51369 multi-queue flow-con- trol device supports reading and writing from either the same queue of from different queues. The ...
Page 33
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 QUEUE MARKing The overall intent of the MARK function is to provide the ability to either re- write and/or re-read information that is ...
Page 34
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 Write Queue MARK WCLK WADEN WADEN Figure 15. MARKing a Queue in Packet Mode - Write Queue MARK Read Queue ...
Page 35
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 Write Queue UN-MARK WCLK WADEN WADEN Figure 17. UN-MARKing a Queue in Packet Mode - Write Queue UN-MARK Read Queue ...
Page 36
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 MARK OPERATIONAL NOTES: IN PACKET MODE Write Port - MARKing a location can only occur during a Queue switch cycle - There is ...
Page 37
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 Write Queue MARK WCLK WADEN WADEN Figure 19. MARKing a Queue in FIFO Mode - Write Queue MARK Read Queue ...
Page 38
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 Un-MARKing a Queue UN-MARKing a Queue in FIFO Mode Write Queue UN-MARK WCLK WADEN WADEN A 1 Figure 21. UN-MARKing a Queue in ...
Page 39
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 Leaving a MARK Active During a Queue switch the value of WEN for the write port and REN for the read port determines ...
Page 40
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 Inactivating a MARK During a Queue switch the value of WEN for the write port and REN for the read port determines whether ...
Page 41
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 Write Cycle Action (active LOW) NO Operation Selects a Queue NO Operation NO Operation Read Cycle Action (active LOW) NO Operation Selects a ...
Page 42
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 FLAG DESCRIPTION PAFn FLAG BUS OPERATION The IDT72P51339/72P51349/72P51359/72P51369 multi-queue flow-con- trol device can be configured for queues, each queue having ...
Page 43
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 is only pertinent to the queue being selected for read operations at that time. Remember, that when in expansion configuration only one multi-queue ...
Page 44
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 write port may experience a change of its internal almost empty flag status based on write operations. The multi-queue flow-control device also provides ...
Page 45
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 TABLE 9 — FLAG OPERATION BOUNDARIES & TIMING Output Ready, EF Flag Boundary I/O Set-Up EF Goes LOW after Last Read In36 to ...
Page 46
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 TABLE 9 — FLAG OPERATION BOUNDARIES & TIMING (CONTINUED) Programmable Almost Empty Flag, PAE Boundary I/O Set-Up in36 to out36 (Both ports selected ...
Page 47
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 address the third status word, Queue[16:23], the RDADD address is “xxxx0010”. PAE[0:7] gets status of queues, Queue[16:23] respectively. To address the fourth status ...
Page 48
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 the PR flag will again gone active, then reads from the new packet may follow after the current packet has been completely read ...
Page 49
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 PACKET MODE DEMARCATION BITS The IDT72P51339/72P51349/72P51359/72P51369 can be configured for packet mode operation. In packet mode the IDT72P51339/72P51349/72P51359/ 72P51369 provides the functionality to ...
Page 50
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 NOTES 18bit word to 36 bit word configuration two (2) eighteen bit words are concatenated to ...
Page 51
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 NOTES bit word to 36 bit word configuration four (4), nine bit words are concatenated ...
Page 52
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 BUS MATCHING OPERATION Bus Matching operation between the input port and output port is available. During a master reset of the multi-queue the ...
Page 53
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 BYTE ORDER ON INPUT PORT: BYTE ORDER ON OUTPUT PORT BYTE ORDER ON INPUT PORT: BYTE ORDER ...
Page 54
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 MRS t RSS WEN REN t RSS SENI t RSS FSTR, ESTR t RSS WADEN, RADEN t RSS ID0, ID1, ID2 t RSS ...
Page 55
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 COMMERCIAL AND INDUSTRIAL 55 TEMPERATURE RANGES AUGUST 4, 2005 ...
Page 56
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 COMMERCIAL AND INDUSTRIAL 56 TEMPERATURE RANGES AUGUST 4, 2005 ...
Page 57
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 WCLK WADEN WEN WRADD Qx FF PAF Active Bus PAF-Qx RCLK REN ...
Page 58
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 COMMERCIAL AND INDUSTRIAL 58 TEMPERATURE RANGES AUGUST 4, 2005 ...
Page 59
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 COMMERCIAL AND INDUSTRIAL 59 TEMPERATURE RANGES AUGUST 4, 2005 ...
Page 60
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 COMMERCIAL AND INDUSTRIAL 60 TEMPERATURE RANGES AUGUST 4, 2005 ...
Page 61
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 WCLK t ENS WEN RCLK REN Qout Last Word Read Out of Queue OR NOTES ...
Page 62
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 COMMERCIAL AND INDUSTRIAL 62 TEMPERATURE RANGES AUGUST 4, 2005 ...
Page 63
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 COMMERCIAL AND INDUSTRIAL 63 TEMPERATURE RANGES AUGUST 4, 2005 ...
Page 64
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 COMMERCIAL AND INDUSTRIAL 64 TEMPERATURE RANGES AUGUST 4, 2005 ...
Page 65
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 COMMERCIAL AND INDUSTRIAL 65 TEMPERATURE RANGES AUGUST 4, 2005 ...
Page 66
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 *A* *B* *C* RCLK t ENS REN RDADD RADEN Qout ...
Page 67
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 COMMERCIAL AND INDUSTRIAL 67 TEMPERATURE RANGES AUGUST 4, 2005 ...
Page 68
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 COMMERCIAL AND INDUSTRIAL 68 TEMPERATURE RANGES AUGUST 4, 2005 ...
Page 69
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 COMMERCIAL AND INDUSTRIAL 69 TEMPERATURE RANGES AUGUST 4, 2005 ...
Page 70
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 COMMERCIAL AND INDUSTRIAL 70 TEMPERATURE RANGES AUGUST 4, 2005 ...
Page 71
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 COMMERCIAL AND INDUSTRIAL 71 TEMPERATURE RANGES AUGUST 4, 2005 ...
Page 72
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 COMMERCIAL AND INDUSTRIAL 72 TEMPERATURE RANGES AUGUST 4, 2005 ...
Page 73
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 *A* *B* WCLK WEN WRADD WADEN Din PAF HIGH-Z (Device 1) ...
Page 74
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 *A* *B* RCLK REN RDADD RADEN HIGH-Z Qout PAE HIGH-Z (Device ...
Page 75
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 RCLK Device 1 Status Word 2 RDADD 001xxx10 t t STS STH ESTR PAEn/ PRn t t ENS ENH ...
Page 76
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 *A* WCLK WADEN FSTR t ENS WEN WRADD D5Q24 101 11000 Wp+1 ...
Page 77
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 *A* *B* RCLK RADEN ESTR REN RDADD D0Q31 000 11111 OE t OLZ Qout W ...
Page 78
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 COMMERCIAL AND INDUSTRIAL 78 TEMPERATURE RANGES AUGUST 4, 2005 ...
Page 79
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 Serial Programming Data Input Serial Enable Data Bus Write Clock Write Enable Write Queue Select Write Address Full Strobe Programmable Almost Full Full ...
Page 80
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 Serial Programming Data Input Serial Enable Data Bus Write Clock Write Enable WCS1 Write Queue Select Write Address Full Strobe Programmable Almost Full ...
Page 81
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 A B RCLK t ENH REN RCS1 Q1_A Q1_B Qout1 RCS2 Qout2 RCS3 Qout3 Q1_A Q1_B Q_Bus NOTE: 1. RCS signals are mutually ...
Page 82
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 JTAG INTERFACE Five additional pins (TDI, TDO, TMS, TCK and TRST) are provided to support the JTAG boundary scan interface. The IDT72P51339/72P51349/ 72P51359/72P51369 ...
Page 83
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 1 0 Input = TMS NOTES: 1. Five consecutive TCK cycles with TMS = 1 will reset the TAP. 2. TAP controller does ...
Page 84
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 THE INSTRUCTION REGISTER The Instruction register allows an instruction to be shifted in serially into the processor at the rising edge of TCLK. ...
Page 85
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 HIGH-IMPEDANCE The optional High-Impedance instruction sets all outputs (including two-state as well as three-state types disabled (high-impedance) state ...
Page 86
IDT72P51339/72P51349/72P51359/72P51369 1.8V, MQ FLOW-CONTROL DEVICES (8 QUEUES) 36 BIT WIDE CONFIGURATION 589, 824, 1,179,648, 2,359,296, and 4,718,592 t 1 TCK t 3 TDI/ TMS TDO t 6 TRST t 5 SYSTEM INTERFACE PARAMETERS Parameter Symbol Test Conditions Data Output t ...
Page 87
ORDERING INFORMATION IDT XXXXX X XX Device Type Power Speed Package NOTES: 1. Industrial temperature range product for the 6ns is available as a standard device. All other speed grades available by special order. 2. Green parts are available. For ...