ADE7878ACPZ Analog Devices Inc, ADE7878ACPZ Datasheet - Page 30

• Manufacturer Part Number: ADE7878ACPZ
• Description: IC ENERGY METERING 3PH 40LFCSP
• Manufacturer: Analog Devices Inc

Specifications of ADE7878ACPZ

• Input Impedance: 400 KOhm
• Measurement Error: 0.1%
• Voltage - I/o High: 2.4V
• Voltage - I/o Low: 0.4V
• Current - Supply: 22mA
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 40-WFQFN, CSP Exposed Pad
• Meter Type: 3 Phase
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: LFCSP
• No. Of Pins: 40
• Msl: MSL 1 - Unlimited
• Peak Reflow Compatible (260 C): Yes
• Supply Voltage Min: 3V
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADE7854/ADE7858/ADE7868/ADE7878
As stated in the Current Waveform Gain Registers section, the
serial ports of the ADE78xx work on 32-, 16-, or 8-bit words.
–89.96
–89.97
–89.98
–89.99
–15
–20
–25
–30
30
30
Figure 38. Combined Gain and Phase Response of the
+0.5V/GAIN
–0.5V/GAIN
35
35
Digital Integrator (40 Hz to 70 Hz)
V
IN
0V
VAP
40
40
VN
V
IN
ANALOG INPUT RANGE
FREQUENCY (Hz)
FREQUENCY (Hz)
45
45
×1, ×2, ×4, ×8, ×16
PGA3
PGA3 BITS
GAIN[8:6]
50
50
55
55
60
60
REFERENCE
0xA58AC0 =
0x5A7540 =
65
65
+5,928,256
–5,928,256
ADC
Figure 39. Voltage Channel Datapath
70
70
0V
Rev. D | Page 30 of 96
ANALOG OUTPUT RANGE
VOLTAGE CHANNEL
AVGAIN[23:0]
DSP
DATA RANGE
Similar to the registers shown in Figure 33, the DICOEFF 24-bit
signed register is accessed as a 32-bit register with four MSBs
padded with 0s and sign extended to 28 bits, which practically
means it is transmitted equal to 0xFFF8000.
When the digital integrator is switched off, the ADE78xx can
be used directly with a conventional current sensor, such as
a current transformer (CT).
VOLTAGE CHANNEL ADC
Figure 39 shows the ADC and signal processing chain for
Input VA in the voltage channel. The VB and VC channels
have similar processing chains. The ADC outputs are signed
twos complement 24-bit words and are available at a rate of
8 kSPS. With the specified full-scale analog input signal of
±0.5 V, the ADC produces its maximum output code value.
Figure 39 shows a full-scale voltage signal being applied to the
differential inputs (VA and VN). The ADC output swings
between −5,928,256 (0xA58AC0) and +5,928,256 (0x5A7540).
HPFDIS
[23:0]
HPF
0xA58AC0 =
VOLTAGE PEAK,
OVERVOLTAGE,
SAG DETECT
CURRENT RMS (VRMS)
CALCULATION
VAWV WAVEFORM
SAMPLE REGISTER
TOTAL/FUNDAMENTAL
ACTIVE AND REACTIVE
POWER CALCULATION
0x5A7540 =
LPF1
+5,928,256
–5,928,256
0V
ZX DETECTION
ZX SIGNAL
DATA RANGE