MT48V8M32LFB5-8 IT TR Micron Technology Inc, MT48V8M32LFB5-8 IT TR Datasheet - Page 41

• Manufacturer Part Number: MT48V8M32LFB5-8 IT TR
• Description: IC SDRAM 256MBIT 125MHZ 90VFBGA
• Manufacturer: Micron Technology Inc

Specifications of MT48V8M32LFB5-8 IT TR

• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 256M (8Mx32)
• Speed: 125MHz
• Interface: Parallel
• Voltage - Supply: 2.3 V ~ 2.7 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 90-VFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1107-2

Truth Tables
Table 8: Truth Table – CKE
PDF: 09005aef80d460f2/Source: 09005aef80cd8d41
256Mb SDRAM x32_2.fm - Rev. G 6/05
CKE
H
H
L
L
n-1
CKE
H
H
Notes: 1–4
L
L
n
Notes: 1. CKE
Reading or Writing
Deep Power-Down
Deep Power-Down
Current State
Clock Suspend
Clock Suspend
All Banks Idle
All Banks Idle
All Banks Idle
Power-Down
Power-Down
Self Refresh
Self Refresh
2. Current state is the state of the SDRAM immediately prior to clock edge n.
3. COMMAND
4. All states and sequences not shown are illegal or reserved.
5. Exiting power-down at clock edge n will put the device in the all banks idle state in time
6. Exiting self refresh at clock edge n will put the device in the all banks idle state once
7. After exiting clock suspend at clock edge n, the device will resume operation and recog-
8. Deep Power-Down is power savings feature of this Mobile SDRAM device. This command is
clock edge.
MAND
for clock edge n + 1 (provided that
is met. COMMAND INHIBIT or NOP commands should be issued on any clock edges occur-
ring during the
t
nize the next command at clock edge n + 1.
BURST TERMINATE when CKE is HIGH and DEEP POWER DOWN when CKE is LOW.
XSR period.
n
is the logic state of CKE at clock edge n; CKE
n
.
n
is the command registered at clock edge n, and ACTION
t
COMMAND INHIBIT or NOP
COMMAND INHIBIT or NOP
COMMAND INHIBIT or NOP
XSR period. A minimum of two NOP commands must be provided during
BURST TERMINATE
See Truth Table 3
AUTO REFRESH
COMMAND
VALID
41
X
X
X
X
X
X
n
t
CKS is met).
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Maintain Deep Power-Down
n-1
Deep Power-Down Entry
Maintain Clock Suspend
256Mb: x32 Mobile SDRAM
Exit Deep Power-Down
Maintain Power-Down
was the state of CKE at the previous
Maintain Self Refresh
Clock Suspend Entry
Exit Clock Suspend
Power-Down Entry
Self Refresh Entry
Exit Power-Down
Exit Self Refresh
ACTION
©2003 Micron Technology, Inc. All rights reserved.
n
n
is a result of COM-
Truth Tables
Notes
8
5
8
6
7
8
t
XSR